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R8C2C Datasheet(PDF) 132 Page - Renesas Technology Corp |
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R8C2C Datasheet(HTML) 132 Page - Renesas Technology Corp |
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132 / 615 page  R8C/2C Group, R8C/2D Group 10. Clock Generation Circuit Rev.2.00 Dec 05, 2007 Page 111 of 585 REJ09B0339-0200 10.5 Power Control There are three power control modes. All modes other than wait mode and stop mode are referred to as standard operating mode. 10.5.1 Standard Operating Mode Standard operating mode is further separated into four modes. In standard operating mode, the CPU clock and the peripheral function clock are supplied to operate the CPU and the peripheral function clocks. Power consumption control is enabled by controlling the CPU clock frequency. The higher the CPU clock frequency, the more processing power increases. The lower the CPU clock frequency, the more power consumption decreases. When unnecessary oscillator circuits stop, power consumption is further reduced. Before the clock sources for the CPU clock can be switched over, the new clock source needs to be oscillating and stable. If the new clock source is the XIN clock or XCIN clock, allow sufficient wait time in a program until oscillation is stabilized before exiting. −: can be 0 or 1, no change in outcome Table 10.2 Settings and Modes of Clock Associated Bits Modes OCD Register CM1 Register CM0 Register FRA0 Register OCD2 CM17, CM16 CM14 CM13 CM07 CM06 CM05 CM04 FRA01 FRA00 High-speed clock mode No division 0 00b − 10 0 0 −−− Divide-by-2 0 01b − 10 0 0 −−− Divide-by-4 0 10b − 10 0 0 −−− Divide-by-8 0 −− 10 1 0 −−− Divide-by-16 0 11b − 10 0 0 −−− Low-speed clock mode No division − −−− 1 −− 1 −− High-speed on-chip oscillator mode No division 1 00b −− 00 −− 11 Divide-by-2 1 01b −− 00 −− 11 Divide-by-4 1 10b −− 00 −− 11 Divide-by-8 1 −−− 01 −− 11 Divide-by-16 1 11b −− 00 −− 11 Low-speed on-chip oscillator mode No division 1 00b 0 − 00 −− 0 − Divide-by-2 1 01b 0 − 00 −− 0 − Divide-by-4 1 10b 0 − 00 −− 0 − Divide-by-8 1 − 0 − 01 −− 0 − Divide-by-16 1 11b 0 − 00 −− 0 − |
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