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M32C83T Datasheet(PDF) 181 Page - Renesas Technology Corp

Part # M32C83T
Description  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T Datasheet(HTML) 181 Page - Renesas Technology Corp

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14. Timer (Timer B)
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14.2.3 Pulse Period/Pulse Width Measurement Mode
In pulse period/pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal. (See Table 14.11) Figure 14.22 shows the TBiMR register (i=0 to 5) in pulse period/pulse
width measurement mode. Figure 14.23 shows an example of an operation timing when measuring a
pulse period. Figure 14.24 shows an example of the pulse width measurement.
Table 14.11 Specifications in Pulse Period/Pulse Width Measurement Mode
Item
Specification
Count Source
f1, f8, f2n(3), fC32
Counting Operation
• The timer increments a counter value
Counter value is transferred to the reload register on the valid edge of a pulse to be
measured. It is set to "000016" and the timer continues counting
Counter Start Condition
The TBiS bit (i=0 to 5) in the TABSR or TBSR register is set to "1" (starts counting)
Counter Stop Condition
The TBiS bit is set to "0" (stops counting)
Interrupt Request Generation Timing • On the valid edge of a pulse to be measured(1)
• The timer counter overflows
The MR3 bit in the TBiMR register is set to "1" (overflow) simultaneously. When the
TBiS bit is set to "1" (start counting) and the next count source is counted after setting
the MR3 bit to "1" (overflow), the MR3 bit can be set to "0" (no overflow) by writing to
the TBiMR register.
TBiIN Pin Function
Input for a pulse to be measured
Read from Timer
The TBi register indicates reload register values (measurement results)(2)
Write to Timer
Value written to the TBi register can be written to neither reload register nor counter
NOTES:
1. No interrupt request is generated when the pulse to be measured is on the first valid edge after the
timer has started counting.
2. The TBi register is in an indeterminate state until the pulse to be measured is on the second valid
edge after the timer has started counting.
3. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).



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