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M32C83T Datasheet(PDF) 220 Page - Renesas Technology Corp |
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M32C83T Datasheet(HTML) 220 Page - Renesas Technology Corp |
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220 / 527 page ![]() Page 197 8 8 4 f o 6 0 0 2 , 1 3 . n a J 1 3 . 1 . v e R 1 3 1 0 - 4 3 0 0 B 9 0 J E R 16. Serial I/O (Special Function) ) T 3 8 / C 2 3 M , 3 8 / C 2 3 M ( p u o r G 3 8 / C 2 3 M Table 16.13 Registers To Be Used and Settings (I2C Mode) Register Bit Function Master Slave UiTB 0 to 7 Set transmit data UiRB 0 to 7 Received data can be read 8 ACK or NACK bit can be read ABT Arbitration lost detect flag Disabled OER Overrun error flag UiBRG 0 to 7 Set bit rate Disabled UiMR SMD2 to SMD0 Set to "0102" CKDIR Set to "0" Set to "1" IOPOL Set to "0" UiC0 CLK1 to CLK0 Select count source of the UiBRG register Disabled CRS Disabled because CRD = 1 TXEPT Transfer register empty flag CRD, NCH Set to "1" CKPOL Set to "0" UFORM Set to "1" UiC1 TE Set to "1" to enable data transmission TI Transfer buffer empty flag RE Set to "1" to enable data reception RI Reception complete flag UiRRM, UiLCH, Set to "0" UiERE UiSMR IICM Set to "1" ABC Select an arbitration lost detect timing Disabled BBS Bus busy flag 3 to 7 Set to "000002" UiSMR2 IICM2 See Table 16.14 CSC Set to "1" to enable clock synchronization Set to "0" SWC Set to "1" to output fixed "L" from the SDAi on the falling edge of the ninth bit of the transfer clock ALS Set to "1" to terminate SDA output when Not used. Set to "0" detecting the arbitration lost STC Not used. Set to "0" Set to "1" to reset UARTi by detecting a start condition SWC2 Set to "1" to forcibly output an "L" signal from SCL SDHI Set to "1" to disable SDA output SU1HIM Set to "0" UiSMR3 SSE Set to "0" CKPH See Table 16.14. DINC, NODC, ERR Set to "0" DL2 to DL0 Set digital delay value UiSMR4 STAREQ Set to "1" when generating start condition Not used. Set to "0" RSTAREQ Set to "1" when generating restart condition STPREQ Set to "1" when generating stop condition STSPSEL Set to "1" when using a condition generating function ACKD Select ACK or NACK ACKC Set to "1" to output ACK data SCLHI Set to "1" to enable SCL output stop when Not used. Set to "0" detecting stop condition SWC9 Not used. Set to "0" Set to "1" to output fixed "L" from SCLi on the falling edge of the ninth bit of the transfer clock IFSR IFSR6, IFSR7 Set to "1" i=0 to 4 |
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