HD64F3694G datasheet(21/450 Pages) RENESAS

21 / 450 page

Rev.5.00 Nov. 02, 2005 Page xxi of xxviii

Figure 11.9 Pulse Output Example ............................................................................................. 148

Figure 11.10 Example of Pulse Output Synchronized to TRGV Input....................................... 149

Figure 11.11 Contention between TCNTV Write and Clear ...................................................... 150

Figure 11.12 Contention between TCORA Write and Compare Match ..................................... 151

Figure 11.13 Internal Clock Switching and TCNTV Operation ................................................. 151

Section 12 Timer W

Figure 12.1 Timer W Block Diagram......................................................................................... 155

Figure 12.2 Free-Running Counter Operation ............................................................................ 166

Figure 12.3 Periodic Counter Operation..................................................................................... 166

Figure 12.4 0 and 1 Output Example (TOA = 0, TOB = 1)........................................................ 167

Figure 12.5 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 167

Figure 12.6 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 167

Figure 12.7 Input Capture Operating Example........................................................................... 168

Figure 12.8 Buffer Operation Example (Input Capture)............................................................. 169

Figure 12.9 PWM Mode Example (1) ........................................................................................ 170

Figure 12.10 PWM Mode Example (2) ...................................................................................... 170

Figure 12.11 Buffer Operation Example (Output Compare) ...................................................... 171

Figure 12.12 PWM Mode Example

(TOB, TOC, and TOD = 0: initial output values are set to 0) ............................... 172

Figure 12.13 PWM Mode Example

(TOB, TOC, and TOD = 1: initial output values are set to 1) ............................... 173

Figure 12.14 Count Timing for Internal Clock Source............................................................... 174

Figure 12.15 Count Timing for External Clock Source.............................................................. 174

Figure 12.16 Output Compare Output Timing ........................................................................... 175

Figure 12.17 Input Capture Input Signal Timing........................................................................ 175

Figure 12.18 Timing of Counter Clearing by Compare Match................................................... 176

Figure 12.19 Buffer Operation Timing (Compare Match).......................................................... 176

Figure 12.20 Buffer Operation Timing (Input Capture) ............................................................. 177

Figure 12.21 Timing of IMFA to IMFD Flag Setting at Compare Match .................................. 177

Figure 12.22 Timing of IMFA to IMFD Flag Setting at Input Capture...................................... 178

Figure 12.23 Timing of Status Flag Clearing by CPU................................................................ 178

Figure 12.24 Contention between TCNT Write and Clear ......................................................... 179

Figure 12.25 Internal Clock Switching and TCNT Operation.................................................... 180

Figure 12.26 When Compare Match and Bit Manipulation Instruction to TCRW

Occur at the Same Timing ..................................................................................... 181

Section 13 Watchdog Timer

Figure 13.1 Block Diagram of Watchdog Timer ........................................................................ 183

Figure 13.2 Watchdog Timer Operation Example...................................................................... 187

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