HD64F2648R datasheet(21/1165 Pages) RENESAS

21 / 1165 page

Rev. 5.00 Sep 22, 2005 page xxi of xxvi

Section 18 LCD Controller/Driver ................................................................................. 645

18.1

Overview .......................................................................................................................... 645

18.1.1 Features................................................................................................................ 645

18.1.2 Block Diagram..................................................................................................... 646

18.1.3 Pin Configuration ................................................................................................ 647

18.1.4 Register Configuration......................................................................................... 647

18.2

Register Descriptions........................................................................................................ 648

18.2.1 LCD Port Control Register (LPCR)..................................................................... 648

18.2.2 LCD Control Register (LCR) .............................................................................. 651

18.2.3 LCD Control Register 2 (LCR2) ......................................................................... 653

18.2.4 Module Stop Control Register D (MSTPCRD) ................................................... 654

18.3

Operation .......................................................................................................................... 655

18.3.1 Settings up to LCD Display ................................................................................. 655

18.3.2 Relationship between LCD RAM and Display.................................................... 657

18.3.3 Operation in Power-Down Modes ....................................................................... 665

18.3.4 Boosting the LCD Drive Power Supply............................................................... 666

Section 19 RAM .................................................................................................................. 667

19.1

Overview .......................................................................................................................... 667

19.1.1 Block Diagram..................................................................................................... 667

19.1.2 Register Configuration......................................................................................... 668

19.2

Register Descriptions........................................................................................................ 668

19.2.1 System Control Register (SYSCR)...................................................................... 668

19.3

Operation .......................................................................................................................... 669

19.4

Usage Notes ...................................................................................................................... 669

Section 20 ROM .................................................................................................................. 671

20.1

Features............................................................................................................................. 671

20.2

Overview .......................................................................................................................... 672

20.2.1 Block Diagram..................................................................................................... 672

20.2.2 Mode Transitions ................................................................................................. 673

20.2.3 On-Board Programming Modes........................................................................... 674

20.2.4 Flash Memory Emulation in RAM ...................................................................... 676

20.2.5 Differences between Boot Mode and User Program Mode ................................. 677

20.2.6 Block Configuration ............................................................................................ 678

20.3

Pin Configuration.............................................................................................................. 679

20.4

Register Configuration......................................................................................................680

20.5

Register Descriptions........................................................................................................ 680

20.5.1 Flash Memory Control Register 1 (FLMCR1) .................................................... 680

20.5.2 Flash Memory Control Register 2 (FLMCR2) .................................................... 683

20.5.3 Erase Block Register 1 (EBR1) ........................................................................... 684

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