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HD6432142 Datasheet(PDF) 748 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 748 Page - Renesas Technology Corp |
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748 / 1177 page ![]() Section 23 ROM (H8S/2148 F-ZTAT A-Mask Version, H8S/2147 F-ZTAT A-Mask Version, H8S/2144 F-ZTAT A-Mask Version) Rev. 4.00 Sep 27, 2006 page 704 of 1130 REJ09B0327-0400 Automatic SCI Bit Rate Adjustment Start bit Stop bit D0 D1 D2 D3 D4 D5 D6 D7 Low period (9 bits) measured (H'00 data) High period (1 or more bits) Figure 23.9 Automatic SCI Bit Rate Adjustment When boot mode is initiated, the chip measures the low period of the asynchronous SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive format should be set as follows: 8-bit data, 1 stop bit, no parity. The chip calculates the bit rate of the transmission from the host from the measured low period, and transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host should confirm that this adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the chip. If reception cannot be performed normally, initiate boot mode again (reset), and repeat the above operations. Depending on the host’s transmission bit rate and the chips system clock frequency, there will be a discrepancy between the bit rates of the host and the chip. To ensure correct SCI operation, the host’s transfer bit rate should be set to (4800, 9600, or 19200) bps. Table 23.7 shows typical host transfer bit rates and system clock frequencies for which automatic adjustment of the chips bit rate is possible. The boot program should be executed within this system clock range. Table 23.7 System Clock Frequencies for Which Automatic Adjustment of the Chips Bit Rate Is Possible Host Bit Rate System Clock Frequency for Which Automatic Adjustment of Bit Rate Is Possible 19200 bps 8 MHz to 20 MHz 9600 bps 4 MHz to 20 MHz 4800 bps 2 MHz to 18 MHz On-Chip RAM Area Divisions in Boot Mode In boot mode, the 1920-byte area from H'(FF)E880 to H'(FF) EFFF and the 128-byte area from H'(FF)FF00 to H'(FF)FF7F is reserved for use by the boot program, as shown in figure 23.10. The area to which the programming control program is transferred is H'(FF)E080 to H'(FF)E87F (2048 bytes). In the 64-kbyte version, this is a reserved area that is used only during the boot mode. However, the 8-byte area from H'(FF)E080 to H'(FF)E087 is reserved for ID codes as shown in |
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