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HD6432142 Datasheet(PDF) 867 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 867 Page - Renesas Technology Corp |
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867 / 1177 page ![]() Section 26 Electrical Characteristics Rev. 4.00 Sep 27, 2006 page 823 of 1130 REJ09B0327-0400 Table 26.22 Bus Timing (2) (Advanced mode) Condition A: V CC = 5.0 V ±10%, VCCB = 5.0 V ±10%, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C (regular specifications), T a = –40 to +85°C (wide-range specifications) Condition B: V CC = 4.0 V to 5.5 V, VCCB = 4.0 V to 5.5 V, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C (regular specifications), T a = –40 to +85°C (wide-range specifications) Condition C: V CC = 2.7 V to 3.6 V, VCCB = 2.7 V to 5.5 V, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C Condition A Condition B Condition C 20 MHz 16 MHz 10 MHz Item Symbol Min Max Min Max Min Max Unit Test Conditions Address delay time t AD —30 — 45 — 60 ns Address setup time t AS 0.5 × t cyc –25 —0.5 × t cyc –35 —0.5 × t cyc –50 —ns Figure 26.10 to figure 26.14 Address hold time t AH 0.5 × t cyc –10 —0.5 × t cyc –15 —0.5 × t cyc –20 —ns CS delay time ( IOS) t CSD —30 — 45 — 60 ns AS delay time t ASD —30 — 45 — 60 ns RD delay time 1 t RSD1 —30 — 45 — 60 ns RD delay time 2 t RSD2 —30 — 45 — 60 ns Read data setup time t RDS 15 — 20 — 35 — ns Read data hold time t RDH 0— 0— 0 — ns Read data access time 1 t ACC1 —1.0 × t cyc –40 —1.0 × t cyc –55 —1.0 × t cyc –80 ns Read data access time 2 t ACC2 —1.5 × t cyc –25 —1.5 × t cyc –35 —1.5 × t cyc –50 ns |
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