H83048 datasheet(23/905 Pages) RENESAS

23 / 905 page

Rev. 7.00 Sep 21, 2005 page xxiii of xxiv

21.5.2 Exit from Hardware Standby Mode ..................................................................... 673

21.5.3 Timing for Hardware Standby Mode ................................................................... 673

21.6 Module Standby Function ................................................................................................. 674

21.6.1 Module Standby Timing ...................................................................................... 674

21.6.2 Read/Write in Module Standby............................................................................ 674

21.6.3 Usage Notes ......................................................................................................... 675

21.7 System Clock Output Disabling Function......................................................................... 676

Section 22 Electrical Characteristics.............................................................................. 677

22.1 Electrical Characteristics for H8/3048 ZTAT (PROM) and On-Chip Mask ROM

Versions ............................................................................................................................ 679

22.1.1 Absolute Maximum Ratings ................................................................................ 679

22.1.2 DC Characteristics ............................................................................................... 680

22.1.3 AC Characteristics ............................................................................................... 686

22.1.4 A/D Conversion Characteristics........................................................................... 693

22.1.5 D/A Conversion Characteristics........................................................................... 694

22.2 Electrical Characteristics of H8/3048F (Dual-Power Supply) .......................................... 695

22.2.1 Absolute Maximum Ratings ................................................................................ 695

22.2.2 DC Characteristics ............................................................................................... 696

22.2.3 AC Characteristics ............................................................................................... 703

22.2.4 A/D Conversion Characteristics........................................................................... 709

22.2.5 D/A Conversion Characteristics........................................................................... 710

22.2.6 Flash Memory Characteristics.............................................................................. 711

22.3 Operational Timing ........................................................................................................... 712

22.3.1 Bus Timing........................................................................................................... 712

22.3.2 Refresh Controller Bus Timing............................................................................ 716

22.3.3 Control Signal Timing ......................................................................................... 721

22.3.4 Clock Timing ....................................................................................................... 723

22.3.5 TPC and I/O Port Timing..................................................................................... 723

22.3.6 ITU Timing .......................................................................................................... 724

22.3.7 SCI Input/Output Timing ..................................................................................... 725

22.3.8 DMAC Timing..................................................................................................... 726

Appendix A Instruction Set............................................................................................. 727

A.1

Instruction List .................................................................................................................. 727

A.2

Operation Code Map......................................................................................................... 742

A.3

Number of States Required for Execution ........................................................................ 745

Appendix B

Internal I/O Register ................................................................................. 755

B.1

Addresses .......................................................................................................................... 756

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