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HD6433044F Datasheet(PDF) 17 Page - Renesas Technology Corp |
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HD6433044F Datasheet(HTML) 17 Page - Renesas Technology Corp |
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17 / 905 page ![]() Rev. 7.00 Sep 21, 2005 page xvii of xxiv 10.2 Register Descriptions ........................................................................................................ 327 10.2.1 Timer Start Register (TSTR)................................................................................ 327 10.2.2 Timer Synchro Register (TSNC) ......................................................................... 328 10.2.3 Timer Mode Register (TMDR) ............................................................................ 330 10.2.4 Timer Function Control Register (TFCR)............................................................ 333 10.2.5 Timer Output Master Enable Register (TOER) ................................................... 335 10.2.6 Timer Output Control Register (TOCR) .............................................................. 337 10.2.7 Timer Counters (TCNT) ...................................................................................... 338 10.2.8 General Registers (GRA, GRB)........................................................................... 339 10.2.9 Buffer Registers (BRA, BRB).............................................................................. 340 10.2.10 Timer Control Registers (TCR) ........................................................................... 341 10.2.11 Timer I/O Control Register (TIOR) ..................................................................... 343 10.2.12 Timer Status Register (TSR)................................................................................ 345 10.2.13 Timer Interrupt Enable Register (TIER) .............................................................. 347 10.3 CPU Interface.................................................................................................................... 349 10.3.1 16-Bit Accessible Registers ................................................................................. 349 10.3.2 8-Bit Accessible Registers ................................................................................... 351 10.4 Operation........................................................................................................................... 352 10.4.1 Overview.............................................................................................................. 352 10.4.2 Basic Functions.................................................................................................... 353 10.4.3 Synchronization ................................................................................................... 362 10.4.4 PWM Mode.......................................................................................................... 364 10.4.5 Reset-Synchronized PWM Mode......................................................................... 368 10.4.6 Complementary PWM Mode ............................................................................... 371 10.4.7 Phase Counting Mode .......................................................................................... 380 10.4.8 Buffering.............................................................................................................. 382 10.4.9 ITU Output Timing .............................................................................................. 389 10.5 Interrupts ........................................................................................................................... 391 10.5.1 Setting of Status Flags.......................................................................................... 391 10.5.2 Clearing of Status Flags ....................................................................................... 393 10.5.3 Interrupt Sources and DMA Controller Activation.............................................. 394 10.6 Usage Notes ...................................................................................................................... 395 Section 11 Programmable Timing Pattern Controller............................................... 411 11.1 Overview........................................................................................................................... 411 11.1.1 Features................................................................................................................ 411 11.1.2 Block Diagram ..................................................................................................... 412 11.1.3 TPC Pins .............................................................................................................. 413 11.1.4 Registers............................................................................................................... 414 11.2 Register Descriptions ........................................................................................................ 415 |
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