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H83502 Datasheet(PDF) 28 Page - Renesas Technology Corp |
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H83502 Datasheet(HTML) 28 Page - Renesas Technology Corp |
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28 / 386 page ![]() 14 Table 1-3 Pin Functions (cont) Pin No. Type Symbol DP-64S FP-64A I/O Name and Function Host interface (HIF) HDB0 to HDB7 57 to 64 49 to 56 I/O Host interface data bus: Bidirectional 8-bit bus for host interface access by the host. CS1 CS2 35 23 27 15 I Chip select 1 and 2: Input pins for selecting host interface channel 1 or channel 2. IOR 37 29 I I/O read: Input pin that enables reads on the host interface. IOW 36 28 I I/O write: Input pin that enables writes to the host interface. HA0 38 30 I Command/data: Input pin that indicates a data access or command access. GA20 24 16 O GATE A20: GATE A20 control signal output pin. HIRQ1 HIRQ11 HIRQ12 21 20 22 13 12 14 O Host interrupt 1, 11, 12: Output pins for interrupt requests to the host. Keyboard control KEYIN0 to KEYIN7 1 to 4 31 to 34 57 to 60 23 to 26 I Keyboard input: Input pins for a matrix keyboard. (P10 to P17 and P20 to P27 are normally used as keyboard scan outputs, enabling a maximum 16- output × 8-input, 128-key matrix to be configured. The number of keys can be increased by using other port outputs.) |
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