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H83067RF Datasheet(PDF) 7 Page - Renesas Technology Corp |
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H83067RF Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 963 page ![]() Rev. 4.00 Jan 26, 2006 page vii of xxii Contents Section 1 Overview............................................................................................................. 1 1.1 Overview........................................................................................................................... 1 1.2 Block Diagram .................................................................................................................. 7 1.3 Pin Description.................................................................................................................. 8 1.3.1 Pin Arrangement .................................................................................................. 8 1.3.2 Pin Functions ....................................................................................................... 10 1.3.3 Pin Assignments in Each Mode ........................................................................... 16 1.4 Notes on Flash Memory R Version Model ....................................................................... 21 1.4.1 Pin Arrangement .................................................................................................. 21 1.4.2 Differences in Flash Memory R Version ............................................................. 21 Section 2 CPU ...................................................................................................................... 23 2.1 Overview........................................................................................................................... 23 2.1.1 Features................................................................................................................ 23 2.1.2 Differences from H8/300 CPU ............................................................................ 24 2.2 CPU Operating Modes ...................................................................................................... 25 2.3 Address Space ................................................................................................................... 26 2.4 Register Configuration ...................................................................................................... 27 2.4.1 Overview.............................................................................................................. 27 2.4.2 General Registers ................................................................................................. 28 2.4.3 Control Registers ................................................................................................. 29 2.4.4 Initial CPU Register Values ................................................................................. 30 2.5 Data Formats ..................................................................................................................... 31 2.5.1 General Register Data Formats ............................................................................ 31 2.5.2 Memory Data Formats ......................................................................................... 32 2.6 Instruction Set ................................................................................................................... 34 2.6.1 Instruction Set Overview ..................................................................................... 34 2.6.2 Instructions and Addressing Modes ..................................................................... 35 2.6.3 Tables of Instructions Classified by Function...................................................... 36 2.6.4 Basic Instruction Formats .................................................................................... 45 2.6.5 Notes on Use of Bit Manipulation Instructions.................................................... 46 2.7 Addressing Modes and Effective Address Calculation ..................................................... 48 2.7.1 Addressing Modes ............................................................................................... 48 2.7.2 Effective Address Calculation ............................................................................. 50 2.8 Processing States............................................................................................................... 54 2.8.1 Overview.............................................................................................................. 54 2.8.2 Program Execution State...................................................................................... 55 2.8.3 Exception-Handling State .................................................................................... 55 |
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