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HD6433726 Datasheet(PDF) 49 Page - Renesas Technology Corp |
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HD6433726 Datasheet(HTML) 49 Page - Renesas Technology Corp |
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49 / 352 page  Rev. 3.00, 12/94, page 34 of 334 Notation Rd General register (destination) Rs General register (source) Rn General register (EAd) <EAd> Destination operand (EAs) <EAs> Source operand CCR Condition code register N N (negative) flag of CCR Z Z (zero) flag of CCR V V (overflow) flag of CCR C C (carry) flag of CCR PC Program counter SP Stack pointer #IMM Immediate data disp Displacement + Addition – Subtraction × Multiplication ÷ Division ∧ AND logical ∨ OR logical ⊕ Exclusive OR logical → Move ∼ Inverse logic (logical complement) :3 3-bit length :8 8-bit length :16 16-bit length ( ) < > Contents of operand effective address |
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