7540 datasheet(102/366 Pages) RENESAS

102 / 366 page

2-26

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

APPLICATION

7540 Group

2.2 Timer A

Fig. 2.2.17 Setting method for event counter mode (1)

2.2.5 Event counter mode

(1) Operation description

Timer A counts signals input from the P00/CNTR1 pin.

Except for this, the operation in event counter mode is the same as in timer mode.

The active edge of CNTR1 pin input signal can be selected from rising or falling by the CNTR1 active

edge switch bit.

Timer A can stop counting by setting “1” to the timer A count stop bit.

Also, when Timer A underflows, the timer A interrupt request bit is set to “1”.

(2) Event counter mode setting method

Figure 2.2.17 and Figure 2.2.18 show the setting method for event counter mode of timer A.

b7b0

Process 1: Disable timer A interrupt and CNTR1 interrupt.

Interrupt control register 1 (ICON1) [Address 3E16]

CNTR1 interrupt disabled

Port P0 direction register (P0D) [Address 0116]

Set the P00/CNTR1 pin to the input mode

Process 2: Set the CNTR1 pin to the input mode.

Interrupt control register 2 (ICON2) [Address 3F16]

Timer A interrupt disabled

Process 3: Set pull-up control register.

Pull-up control register (PULL) [Address 1616]

P00/CNTR1 pull-up control bit

0: Pull-up Off

1: Pull-up On

Process 4: Set timer A mode register.

Timer A mode register (TAM) [Address 1D16]

Event counter mode

CNTR1 active edge selected

0: Rising period measured

Falling edge active for CNTR1 interrupt

1: Falling period measured

Rising edge active for CNTR1 interrupt

Timer A count stop

Process 5: Set the count value to timer A (Note).

• Set the count value to timer A (low-order)

Timer A (low-order) (TAL) (Address 1E16)

Count value

Timer A (high-order) (TAH) (Address 1F16)

Note: Write both registers in order of timer X (low-order) and the timer X (high-order) following, certainly.

Count value

• Set the count value to timer A (high-order)

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