7540 datasheet(149/366 Pages) RENESAS

149 / 366 page

2-73

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

7540 Group

APPLICATION

2.5 Timer Y and timer Z

2.5.3 Timer mode (timer Y and timer Z)

The basic operation of Timer Y and Timer Z are the same. In this section, Timer Y is explained.

(1) Operation description

Prescaler Y counts the count source selected by the timer Y count source selection bits. Each time

the count clock is input, the contents of Prescaler Y is decremented by 1.

When the contents of Prescaler Y reach “0016”, an underflow occurs at the next count clock, and the

prescaler Y latch is reloaded into Prescaler Y and count continues. The division ratio of Prescaler

Y is 1/(n+1) provided that the value of Prescaler Y is n.

The contents of Timer Y is decremented by 1 each time the underflow signal of Prescaler Y is input.

When the contents of Timer Y reach “0016”, an underflow occurs at the next count clock, and the

timer Y primary latch is reloaded into Timer Y and count continues.

(In the timer mode, the contents of timer Y primary latch is counted. Timer Y secondary latch is not

used in this mode.)

The division ratio of Timer Y is 1/(m+1) provided that the value of Timer Y is m. Accordingly, the

division ratio of Prescaler Y and Timer Y is provided as follows that the value of Prescaler Y is n

and the value of Timer Y is m.

In the timer mode, writing to “latch only” or “latches and Prescaler Y and timer Y primary” can be

selected by the setting value of the timer Y write control bit.

Timer Y can stop counting by setting “1” to the timer Y count stop bit.

Also, when timer Y underflows, the timer Y interrupt request bit is set to “1”.

Timer Y reloads the value of latch when counting is stopped by the timer count stop bit.

(When timer is read out while timer is stopped, the value of latch is read. The value of timer can be

read out only while timer is operating.)

(2) Timer mode setting method

Figure 2.5.19 shows the setting method for timer mode of Timer Y.

When Timer Z is used, registers are set by the same method.

Division ratio =

(n+1) ✕ (m+1)

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