7540 datasheet(145/366 Pages) RENESAS

145 / 366 page

2-69

REJ09B0018-0200Z

Rev.2.00

Jun 21, 2004

7540 Group

APPLICATION

2.5 Timer Y and timer Z

Fig. 2.5.12 Structure of Timer count source set register

Fig. 2.5.13 Structure of Interrupt edge selection register

b7b6b5b4b3b2b1b0

Function

At reset

Name

Timer count source set register (TCSS) [Address : 2E16]

Nothing is allocated for this bit. This is a write disabled bit.

When this bit is read out, the value is “0”.

Timer count source set register

Timer X count source

selection bits

b1 b0

0 0 : f(XIN)/16

0 1 : f(XIN)/2

1 0 : f(XIN) (Note 1)

1 1 : Not available

Timer Y count source

selection bits

Timer Z count source

selection bits

Notes 1: f(XIN) can be used as timer X count source only when using a ceramic oscillator

or on-chip oscillator.

Do not use it at RC oscillation.

2: System operates using an on-chip oscillator as a count source by setting the

on-chip oscillator to oscillation enabled by bit 3 of CPUM.

Fix this bit to “0”.

b5 b4

0 0 : f(XIN)/16

0 1 : f(XIN)/2

1 0 : Timer Y underflow

1 1 : Not available

b3 b2

0 0 : f(XIN)/16

0 1 : f(XIN)/2

1 0 : On-chip oscillator output

(Note 2)

1 1 : Not available

Interrupt edge selection register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

Interrupt edge selection register (INTEDGE) [Address : 3A 16]

Nothing is allocated for these bits. These are write disabled bits.

When these bits are read out, the values are “0”.

INT0 interrupt edge

selection bit

INT1 interrupt edge

selection bit

0 : Falling edge active

1 : Rising edge active

0 : Falling edge active

1 : Rising edge active

P00 key-on wakeup enable bit

0 : Key-on wakeup enabled

1 : Key-on wakeup disabled

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