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7540 Datasheet(PDF) 141 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 141 Page - Renesas Technology Corp |
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141 / 366 page ![]() 2-65 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 7540 Group APPLICATION 2.5 Timer Y and timer Z Fig. 2.5.4 Structure of Pull-up control register Pull-up control register b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 5 6 7 Name P00 pull-up control bit 0 0 0 0 0 0 0 0 Pull-up control register (PULL) [Address : 16 16] 0 : Pull-up Off 1 : Pull-up On Notes 1: Pins set to output are disconnected from the pull-up control. 2: Keep setting the P3 5, P36 pull-up control bit to “1” (initial value: 0) for the 32-pin package versions. P01 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P02, P03 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P04 – P07 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P30 – P33 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P34 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P35, P36 pull-up control bit 0 : Pull-up Off 1 : Pull-up On P37 pull-up control bit 0 : Pull-up Off 1 : Pull-up On Fig. 2.5.5 Structure of Port P1P3 control register Port P1P3 control register b7 b6 b5 b4 b3 b2 b1 b0 B Function At reset RW 0 1 2 3 4 5 6 7 Name P37/INT0 input level selection bit 0 0 0 0 0 0 0 0 Port P1P3 control register (P1P3C) [Address : 17 16] 0 : CMOS level 1 : TTL level P36/INT1 input level selection bit (Note) 0 : CMOS level 1 : TTL level P10, P12,P13 input level selection bit 0 : CMOS level 1 : TTL level Nothing is allocated for these bits. These are write disabled bits. When these bits are read out, the values are “0”. ✕ ✕ ✕ ✕ ✕ Note: Keep setting the P3 6/INT1 input level selection bit to “0” (initial value) for the 32-pin package version. |
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