TDA7437T datasheet(14/23 Pages) STMICROELECTRONICS

14 / 23 page

MUTE & PAUSE FEATURES

The TDA7437 provides three types of mute, con-

trolled via I2C bus (see pag. 10, MUTE BYTE regis-

ter).

SOFT MUTE

Bit D0=1

→ Soft Mute ON

Bit D0=0

→Soft Mute OFF

It allows an automatic soft muting and unmuting

of the signal.

The time constant is fixed by an external capaci-

tor Csm inserted between pin Csm and ground.

Once fixed the external capacitor, two different

slopes (time constant) are selectable by program-

mation of bit D1.

Bit D1=0

→ fast slope (I=Imax)

Bit D1=1

→ slow slope (I=Imin)

The soft mute generates a gradual signal de-

creasing avoiding big click noise of an immediate

high attenuation, without necessity to program a

sequence of decreasing volume levels. A re-

sponse example is reported in Fig.12 (mute) and

Fig.13 (unmute). The final attenuation obtained

with soft mute ON is 60dB typical.

The used reference parameter is the delay time

taken to reach 20dB attenuation (no matter what

the signal level is).

Using a capacitor Csm=22nF this delay is:

d = 1. 8ms when selected Fast slope mode (bit D1=0)

d = 25 ms when selected Slow slope mode (bit D1=1

In application, the soft mute ON programmation

should be followed by programmation of DIRECT

MUTE ON (see later) in order to achieve a final

100dB attenuation.

Beside the I2C bus programmation, the Soft Mute

ON can be generated in a fast way by forcing a

LOW level at pin SMEXT (TTL Level compatible).

This approach is recommended for fast RDS AF

switching.

The Soft Mute status can be detected via I2C

bus, reading the Transmitted Byte, bit SM (see

data sheet pag. 8).

read bit SM = 1 soft mute status ON

read bit SM = 0 soft mute status OFF

DIRECT MUTE

bit D3 = 1 Direct mute ON

bit D3 = 0 Direct nute OFF

The direct mute bit forces an internal immediate

signal connection to ground.

It is located just before the Volume/Loudness

stage, and gives a typical 100dB attenuation.

SPEAKERS MUTE

An additional direct mute function is included in

the speakers attenuators stage.

The four output LF, RF, LR, RR can be separately

muted by setting the speaker attenuator byte to

the value 01111111 binary.

Typical attenuation level 100dB. This mute is use-

ful for fader and balance functions. It should not

be applied for system mute/unmute, because it

can generate noise due to the offset of previous

stages (bass / treble).

ZEROCROSSING MUTE

bit D2=1 D4=0 zero crossing mute ON

bit D2=0 D4=0 zero crossing mute OFF

The mute activation/deactivation is delayed until

the signal waveform crosses the DC zero level

(Vref level).

The detection works separately for the left and

the right channels (see Figg. 14, 15). Four differ-

ent windows threshold are software selectable by

two dedicated bits.

bit D6 bit D5

WINDOW

Vref DC +/-220mV

Vref DC +/-110mV

Vref DC +/-60mV

Vref DC +/-30mV

The zero crossing mute activation/deactivation

starts when the AC signal level falls inside the se-

lected window (internal comparator).

The ZEROCROSS Mute (and Pause) detector is

always active. It can be disabled, if the feature is

not used, by forcing the bit D4=1 Zero crossing

and Pause detector reset.

In this way the internal comparator logic is

stopped, eliminating its switching noise.

The zero cross mute status is detected reading

the Transmitted Byte bit ZM.

bit ZM = 1 zero cross mute status ON

bit ZM = 0 zero cross mute status OFF

PAUSE FUNCTION

On chip is implemented a pause detector block.

It uses the same 4 windows threshold selectable

for the zero crossing mute, bit D6,D5 byte MUTE

(see above). The detector can be put in OFF by

forcing bit D4=1, otherwise it is active.

The Pause detector info is available at PAUSE

pin. A capacitor must be connected between

PAUSE pin and Ground.

When the incoming signal is detected to be out-

side the selected window, the external capacitor

is discharged. When the signal is inside the win-

dow, the capacitor is integrating up (see Figg.16

and 17).

TDA7437

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