TDA7561 datasheet(12/19 Pages) STMICROELECTRONICS

12 / 19 page

TDA7561

12/19

S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted

to ground (test-current source side= so, test-current sink side = sk). More precisely, so = CH+, sk = CH-.

In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*) , which is not

among the recognisable faults. Should an Open Load be present during the device's normal working, it would

be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on).

FAULTS AVAILABILITY

All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined

period of time. If the fault is stable throughout the whole period, it will be sent out.

To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be

reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start,

but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd,

then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result

of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to

observe a change in Diagnostic bytes, two I2C reading operations are necessary.

I2C PROGRAMMING/READING SEQUENCE

A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as

follows (after battery connection):

TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT

TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN)

Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear).

OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until

high-offset message disappears).

I2C BUS INTERFACE

Data transmission from microprocessor to the TDA7561 and viceversa takes place through the 2 wires I2C BUS

interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connect-

ed).

Data Validity

As shown by fig. 19, the data on the SDA line must be stable during the high period of the clock.

The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.

Start and Stop Conditions

As shown by fig. 20 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.

The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.

Byte Format

Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.

The MSB is transferred first.

TDA7561 Datasheet(PDF) 12 Page - STMicroelectronics