Preliminary Technical Data

ADIS16364

Rev. PrA | Page 13 of 16

INPUT/OUTPUT FUNCTIONS

General-Purpose I/O

DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose

I/O lines that serve multiple purposes according to the following

control register priority: MSC_CTRL, ALM_CTRL, and

GPIO_CTRL. For example, set GPIO_CTRL = 0x080C (DIN =

0xB508, then 0xB40C) to set DIO1 and DIO2 as inputs and

DIO3 and DIO4 as outputs, with DIO3 set low and DIO4 set high.

Table 16. GPIO_CTRL

Bit

Description

[15:12]

Not used

[11]

General-Purpose I/O Line 4 (DIO4) data level

[10]

General-Purpose I/O Line 3 (DIO3) data level

[9]

General-Purpose I/O Line 2 (DIO2) data level

[8]

General-Purpose I/O Line 1 (DIO1) data level

[7:4]

Not used

[3]

General-Purpose I/O Line 4 (DIO4), direction control

1 = output, 0 = input

[2]

General-Purpose I/O Line 3 (DIO3), direction control

1 = output, 0 = input

[1]

General-Purpose I/O Line 2 (DIO2), direction control

1 = output, 0 = input

[0]

General-Purpose I/O Line 1 (DIO1), direction control

1 = output, 0 = input

Input Clock Configuration

The input clock configuration function allows for external

control over sampling in the ADIS16364. Set GPIO_CTRL[3] =

0 (DIN = 0x0B200) and SMPL_PRD[7:0] = 0x00 (DIN =

0xB600) to enable this function. See Table 2 and Figure 4 for

timing information.

Data Ready I/O Indicator

The factory default sets DIO1 as a positive data ready indicator

signal. The MSC_CTRL[2:0] register provides configuration

options for changing this. For example, set MSC_CTRL[2:0] =

100 (DIN = 0xB404) to change the polarity of the data ready

signal for interrupt inputs that require negative logic inputs for

activation. The pulse width will be between 100 μs and 200 μs

over all conditions.

Table 17. MSC_CTRL

Bits

Description

[15:12]

Not used

[11]

Memory test (clears on completion)

1 = enabled, 0 = disabled

[10]

Internal self-test enable (clears on completion)

1 = enabled, 0 = disabled

[9]

Manual self-test, negative stimulus

1 = enabled, 0 = disabled

[8]

Manual self-test, positive stimulus

1 = enabled, 0 = disabled

[7]

Linear acceleration bias compensation for gyroscopes

1 = enabled, 0 = disabled

[6]

Linear accelerometer origin alignment

1 = enabled, 0 = disabled

[5:3]

Not used

[2]

Data ready enable

1 = enabled, 0 = disabled

[1]

Data ready polarity

1 = active high, 0 = active low

[0]

Data ready line select

1 = DIO2, 0 = DIO1

Auxiliary DAC

The 12-bit AUX_DAC line can drive its output to within 5 mV

of the ground reference when it is not sinking current. As the

output approaches 0 V, the linearity begins to degrade (~100 LSB

beginning point). As the sink current increases, the nonlinear

range increases. The DAC latch command moves the values of

the AUX_DAC register into the DAC input register, enabling

both bytes to take effect at the same time.

Table 18. AUX_DAC

Bit

Description

[15:12]

Not used

[11:0]

Data bits, scale factor = 0.8059 mV/code

Offset binary format, 0 V = 0 codes

Table 19. Setting AUX_DAC = 1 V

DIN

Descripition

0xB0D9

AUX_DAC[7:0] = 0xD9 (217 LSB).

0xB104

AUX_DAC[15:8] = 0x04 (1024 LSB).

0xBE04

GLOB_CMD[2] = 1.

Move values into the DAC input register, resulting

in a 1 V output level.