TPS2552DBVT datasheet(16/26 Pages) TI

16 / 26 page

ACCOUNTING FOR RESISTOR TOLERANCE

CONSTANT-CURRENT VS. LATCH-OFF OPERATION AND IMPACT ON OUTPUT VOLTAGE

TPS2552

TPS2553, TPS2552-1, TPS2553-1

SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com

The previous sections described the selection of RILIM given certain application requirements and the importance

of understanding the current-limit threshold tolerance. The analysis focussed only on the TPS2552/53 and

TPS2552-1/53-1 performance and assumed an exact resistor value. However, resistors sold in quantity are not

exact and are bounded by an upper and lower tolerance centered around a nominal resistance. The additional

RILIM resistance tolerance directly affects the current-limit threshold accuracy at a system level. The following

table shows a process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one

follows the selection process outlined in the application examples above. Step two determines the upper and

lower resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS

equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%,

when precision current limiting is desired.

Table 1. Common RILIM Resistor Selections

Resistor Tolerance

Actual Limits

Ideal

Closest 1%

Desired Nominal

Resistor

IOS MIN

IOS Nom

IOS MAX

Current Limit (mA)

1% low (k

Ω)

1% high (k

Ω)

(mA)

SHORT ILIM to IN

50.0

75.0

100.0

120

226.1

226

223.7

228.3

101.3

120.0

142.1

200

134.0

133

131.7

134.3

173.7

201.5

233.9

300

88.5

88.7

87.8

89.6

262.1

299.4

342.3

400

65.9

66.5

65.8

67.2

351.2

396.7

448.7

500

52.5

52.3

51.8

52.8

448.3

501.6

562.4

600

43.5

43.2

42.8

43.6

544.3

604.6

673.1

700

37.2

37.4

37.0

37.8

630.2

696.0

770.8

800

32.4

32.1

32.7

729.1

800.8

882.1

900

28.7

28.4

29.0

824.7

901.5

988.7

1000

25.8

26.1

25.8

26.4

908.3

989.1

1081.0

1100

23.4

23.2

23.0

23.4

1023.7

1109.7

1207.5

1200

21.4

21.5

21.3

21.7

1106.0

1195.4

1297.1

1300

19.7

19.6

19.4

19.8

1215.1

1308.5

1414.9

Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically

during normal operation, i.e. the load current is less than the current-limit threshold and the devices are not

limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT x

rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT ≈ VIN.

Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically

during the initial onset of an overcurrent event. Both devices limit current to the programmed current-limit

threshold set by RILIM by operating the N-channel MOSFET in the linear mode. During current-limit operation, the

N-channel MOSFET is no longer fully-enhanced and the resistance of the device increases. This allows the

device to effectively regulate the current to the current-limit threshold. The effect of increasing the resistance of

the MOSFET is that the voltage drop across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases.

The amount that VOUT decreases is proportional to the magnitude of the overload condition. The expected VOUT

can be calculated by IOS × RLOAD, where IOS is the current-limit threshold and RLOAD is the magnitude of the

overload condition. For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the

resulting VOUT is 1 V.

While both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically

during the initial onset of an overcurrent event, they behave differently if the overcurrent event lasts longer than

the internal delay "deglitch" circuit (7.5-ms typ). The constant-current devices (TPS2552/53) assert the FAULT

flag after the deglitch period and continue to regulate the current to the current-limit threshold indefinitely. In

practical circuits, the power dissipation in the package will increase the die temperature above the

overtemperature shutdown threshold (135°C min), and the device will turn off until the die temperature decreases

by the hysteresis of the thermal shutdown circuit (10°C typ). The device will turn on and continue to thermal cycle

Submit Documentation Feedback

Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1

TPS2552DBVT Datasheet(PDF) 16 Page - Texas Instruments

TPS2552DBVT Datasheet(HTML) 16 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Datasheet Download

Link URL