| Electronic Components Datasheet Search |
|
MAX17005A Datasheet(PDF) 21 Page - Maxim Integrated Products |
|
|
|||||||||||||||||||||||||||||
MAX17005A Datasheet(HTML) 21 Page - Maxim Integrated Products |
|
21 / 23 page ![]() 1.2MHz, Low-Cost, High-Performance Chargers ______________________________________________________________________________________ 21 b) Minimize ground trace lengths in the high-current paths. c) Minimize other trace lengths in the high-current paths. d) Use > 5mm wide traces in the high-current paths. e) Connect CIN to high-side MOSFET (10mm max length). f) Minimize the LX node (MOSFETs, rectifier cath- ode, inductor (15mm max length)). Keep LX on one side of the PCB to reduce EMI radiation. Ideally, surface-mount power components are flush against one another with their ground terminals almost touching. These high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. The resulting top-layer subground plane is connected to the normal inner-layer ground plane at the paddle. Other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all PCB layout problems. 2) Place the IC and signal components. Keep the main switching node (LX node) away from sensitive analog components (current-sense traces and VAA capacitor). Important: the IC must be no further than 10mm from the current-sense resistors. Quiet con- nections to VAA and CC should be returned to a sep- arate ground (GND) island. There is very little current flowing in these traces, so the ground island need not be very large. When placed on an inner layer, a siz- able ground island can help simplify the layout because the low-current connections can be made through vias. The ground pad on the backside of the package should also be connected to this quiet ground island. 3) Keep the gate drive traces (DHI and DLO) as short as possible (L < 20mm), and route them away from the current-sense lines and VAA. These traces should also be relatively wide (W > 1.25mm). 4) Place ceramic bypass capacitors close to the IC. The bulk capacitors can be placed further away. Place the current-sense input filter capacitors under the part, connected directly to the GND pin. 5) Use a single-point star ground placed directly below the part at the PGND pin. Connect the power ground (ground plane) and the quiet ground island at this location. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |