CY22393, CY22394, CY22395
Document #: 38-07186 Rev. *D
Page 13 of 19
Absolute Maximum Conditions
Supply Voltage................................................–0.5V to +7.0V
DC Input Voltage ........................... –0.5V to + (AVDD + 0.5V)
Storage Temperature .................................. –65°C to +125°C
Junction Temperature .................................................. 125°C
Data Retention at Tj=125×C..................................> 10 years
Maximum Programming Cycles....................................... 100
Package Power Dissipation...................................... 350 mW
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ........................... > 2000V
Latch up (per JEDEC 17) .................................... > ±200 mA
Stresses exceeding Absolute Maximum Conditions may cause
permanent damage to the device. These conditions are stress
ratings only. Functional operation of the device at these or any
other conditions beyond those indicated in the operation
sections of this data sheet is not implied. Extended exposure to
Absolute Maximum Conditions may affect reliability.
Operating Conditions
Parameter
Description
Part Numbers
Min
Typ
Max
Unit
VDD/AVDD/LVDD Supply Voltage
All
3.135
3.3
3.465
V
LVDD
2.5V Output Supply Voltage
CY22395
2.375
2.5
2.625
V
TA
Commercial Operating Temperature, Ambient All
0
–
+70
°C
Industrial Operating Temperature, Ambient
All
–40
–
+85
°C
CLOAD_OUT
Maximum Load Capacitance
All
–
–
15
pF
fREF
External Reference Crystal
All
8
–
30
MHz
External Reference Clock,[3] Commercial
All
1
–
166
MHz
External Reference Clock,[3] Industrial
All
1
–
150
MHz
3.3V Electrical Characteristics
Parameter
Description
Conditions[2]
Min
Typ
Max
Unit
IOH
Output High Current[4]
VOH =(L)VDD – 0.5, (L)VDD =3.3V
12
24
–
mA
IOL
Output Low Current[4]
VOL = 0.5, (L)VDD =3.3V
12
24
–
mA
CXTAL_MIN
Crystal Load Capacitance[4]
Capload at minimum setting
–
6
–
pF
CXTAL_MAX
Crystal Load Capacitance[3]
Capload at maximum setting
–
30
–
pF
CIN
Input Pin Capacitance[4]
Except crystal pins
–
7
–
pF
VIH
HIGH-Level Input Voltage
CMOS levels,% of AVDD
70%
–
–
AVDD
VIL
LOW-Level Input Voltage
CMOS levels,% of AVDD
–30%
AVDD
IIH
Input HIGH Current
VIN =AVDD –0.3 V
–
<1
10
μA
IIL
Input LOW Current
VIN =+0.3V
–
<1
10
μA
IOZ
Output Leakage Current
Three-state outputs
–
10
μA
IDD
Total Power Supply Current
3.3V Power Supply;
2 outputs at 20 MHz; 4 outputs at 40 MHz
–50
–
mA
3.3V Power Supply;
2 outputs at 166 MHz; 4 outputs at 83 MHz
–100
–
mA
IDDS
Total Power Supply Current in
Shutdown Mode
Shutdown active
–
5
20
μA
Notes
2. Unless otherwise noted, Electrical and Switching Characteristics are guaranteed across these operating conditions.
3. External input reference clock must have a duty cycle between 40% and 60%, measured at VDD/2.
4. Guaranteed by design, not 100% tested.
5. VDDL is only specified and characterized at 3.3V ± 5% and 2.5V ± 5%. VDDL may be powered at any value between 3.465 and 2.375.
2.5V Electrical Characteristics (CY22395 only)[5]
Parameter
Description
Conditions
Min
Typ
Max
Unit
IOH_2.5
Output High Current[4]
VOH =LVDD – 0.5, LVDD =2.5 V
8
16
–
mA
IOL_2.5
Output Low Current[4]
VOL = 0.5, LVDD =2.5 V
8
16
–
mA
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