SSL1750_1

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 01 — 15 September 2008

14 of 29

NXP Semiconductors

SSL1750

SMPS control IC for LED drivers

In frequency reduction mode the PFC controller is switched to burst mode operation and

the flyback maximum frequency changes linearly with the control voltage on pin FBCTRL

(see Figure 9). For stable on-off switching of the PFC burst mode pin FBCTRL has a

50 mV (typ) hysteresis. At no load operation the switching frequency of the flyback can be

reduced to (almost) zero.

7.3.2 Valley switching (pin HV)

See Figure 10. A new cycle starts when the external MOSFET is activated. After the

on-time (determined by the FBSENSE voltage and the FBCTRL voltage), the MOSFET is

switched off and the secondary stroke starts. After the secondary stroke, the drain voltage

shows an oscillation with a frequency of approximately, see Equation 2

(2)

capacitance on the drain node.

As soon as the internal oscillator voltage is high again and the secondary stroke has

ended, the circuit waits for the lowest drain voltage before starting a new primary stroke.

Figure 10 shows the drain voltage, valley signal, secondary stroke signal, and the internal

oscillator signal.

Valley switching allows high frequency operation as capacitive switching losses are

reduced, see Equation 3. High frequency operation makes small and cost-effective

magnetics possible.

(3)

Fig 9.

Frequency control of flyback part

1.5 V

discontinuous

with valley

switching

quasi resonant

frequency

reduction

PFC burst mode

switching frequency

014aaa026

PFC on

1

2

π

×

L

p

C

d

×

()

×

()

----------------------------------------------------

P

1

2

---

C

d

V

2

×

f

×

×

=

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