CS4364 datasheet(29/50 Pages) CIRRUS

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DS619F1

CS4364

converted incorrectly by the Hardware Mode settings).

Set the PDN bit to 0. This will initiate the power-up sequence, which lasts approximately 50 µs.

4.13

Recommended Procedure for Switching Operational Modes

For systems where the absolute minimum in clicks and pops is required, it is recommended that the MUTE

bits are set prior to changing significant DAC functions (such as changing sample rates or clock sources).

The mute bits may then be released after clocks have settled and the proper modes have been set.

It is required to have the device held in reset if the minimum high/low time specs of MCLK can not be met

during clock source changes.

4.14

Control Port Interface

The control port is used to load all the internal register settings in order to operate in Software Mode (see

the “Parameter Definitions” on page 47). The operation of the control port may be completely asynchronous

with the audio sample rate. However, to avoid potential interference problems, the control port pins should

remain static if no operation is required.

The control port operates in one of two modes: I²C or SPI.

4.14.1

MAP Auto Increment

The device has MAP (memory address pointer) auto increment capability enabled by the INCR bit (also

the MSB) of the MAP. If INCR is set to 0, MAP will stay constant for successive I²C writes or reads and

SPI writes. If INCR is set to 1, MAP will auto increment after each byte is written, allowing block reads or

writes of successive registers.

4.14.2

I²C Mode

In the I²C Mode, data is clocked into and out of the bi-directional serial control data line, SDA, by the serial

control port clock, SCL (see Figure 22 for the clock to data relationship). There is no CS pin. Pin AD0 en-

ables the user to alter the chip address (001100[AD0][R/W]) and should be tied to VLC or GND as re-

quired, before powering up the device. If the device ever detects a high to low transition on the AD0/CS

pin after power-up, SPI Mode will be selected.

4.14.2.1 I²C Write

To write to the device, follow the procedure below while adhering to the control port Switching Specifica-

tions in Section 2.

Initiate a START condition to the I²C bus followed by the address byte. The upper 6 bits must be

001100. The seventh bit must match the setting of the AD0 pin, and the eighth must be 0. The eighth

bit of the address byte is the R/W bit.

Wait for an acknowledge (ACK) from the part, then write to the memory address pointer, MAP. This

byte points to the register to be written.

Wait for an acknowledge (ACK) from the part, then write the desired data to the register pointed to by

the MAP.

If the INCR bit (see Section 4.14.1) is set to 1, repeat the previous step until all the desired registers

are written, then initiate a STOP condition to the bus.

If the INCR bit is set to 0 and further I²C writes to other registers are desired, it is necessary to initiate

a repeated START condition and follow the procedure detailed from step 1. If no further writes to other

registers are desired, initiate a STOP condition to the bus.

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