ATA5756 datasheet(2/20 Pages) ATMEL

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4702J–RKE–09/08

ATA5756/ATA5757

Pin Configuration

Figure 2-1.

Pinning TSSOP10

CLK

ASK

FSK

ANT2

ENABLE

GND

XTO1

ATA5756

ATA5757

ANT1

XTO2

Table 2-1.

Pin Description

Symbol

Function

Configuration

1CLK

Clock output signal for the

microcontroller.

The clock output frequency is set by the

crystal to fXTAL/8.

The CLK output stays Low in

power-down mode and after enabling of

the PLL.

The CLK output switches on if the

oscillation amplitude of the crystal has

reached a certain level.

ASK

Switches on the power amplifier for

ASK modulation and enables the PLL

and XTO if the ENABLE pin is open

3FSK

Switches off the FSK switch (switch has

high Z if signal at pin FSK is High) and

enables the PLL and the XTO if the

ENABLE pin is open

CLK

100

200k

ASK

50k

Ref = 1.1V

20 µA

200k

FSK

200k

Ref = 1.1V

5 µA

200k

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