Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

ACS8526LC Datasheet(PDF) 58 Page - Semtech Corporation

Part # ACS8526LC
Description  Line Card Protection Switch for PDH, SONET or SDH Systems
PDF  74 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

ACS8526LC Datasheet(HTML) 58 Page - Semtech Corporation

Back Button ACS8526LC Datasheet HTML 54Page - Semtech Corporation ACS8526LC Datasheet HTML 55Page - Semtech Corporation ACS8526LC Datasheet HTML 56Page - Semtech Corporation ACS8526LC Datasheet HTML 57Page - Semtech Corporation ACS8526LC Datasheet HTML 58Page - Semtech Corporation ACS8526LC Datasheet HTML 59Page - Semtech Corporation ACS8526LC Datasheet HTML 60Page - Semtech Corporation ACS8526LC Datasheet HTML 61Page - Semtech Corporation ACS8526LC Datasheet HTML 62Page - Semtech Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 58 / 74 page
background image
ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 4.01/June 2006 © Semtech Corp.
Page 58
www.semtech.com
ACS8526 LC/P LITE
Address (hex):
7A
Register Name cnfg_sync_pulses
Description
(R/W) Register to configure the
Sync outputs available from
FrSync and MFrSync and select
the source for the 2 kHz and
8 kHz outputs from O1 and O2.
Default Value
0000 0000
Bit 7Bit 6
Bit 5Bit 4
Bit 3
Bit 2Bit 1Bit 0
2k_8k_from_
DPLL2
8k_invert
8k_pulse
2k_invert
2k_pulse
Bit No.
Description
Bit Value
Value Description
7
2k_8k_from_DPLL2
Register to select the source (DPLL1 or DPLL2) for
the 2 kHz and 8 kHz outputs available from O1 and
O2.
0
1
2/8 kHz on O1 and O2 generated from DPLL1.
2/8 kHz on O1 and O2 generated from DPLL2.
[6:4]
Not used.
-
-
3
8k_invert
Register bit to invert the 8 kHz output from FrSync.
0
1
8 kHz FrSync output not inverted.
8 kHz FrSync output inverted.
2
8k_pulse
Register bit to enable the 8 kHz output from FrSync
to be either pulsed or 50:50 duty cycle. Output 02
must be enabled to use “pulsed output” mode on
the FrSync output, and then the pulse width on the
FrSync output will be equal to the period of the
output programmed on O2.
0
1
8 kHz FrSync output not pulsed.
8 kHz FrSync output pulsed.
1
2k_invert
Register bit to invert the 2 kHz output from
MFrSync.
0
1
2 kHz MFrSync output not inverted.
2 kHz MFrSync output inverted.
0
2k_pulse
Register bit to enable the 2 kHz output from
MFrSync to be either pulsed or 50:50 duty cycle.
Output 03 must be enabled to use “pulsed output”
mode on the MFrSync output, and then the pulse
width on the MFrSync output will be equal to the
period of the output programmed on O3.
0
1
2 kHz MFrSync output not pulsed.
2 kHz MFrSync output pulsed.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com