SC471AEVB datasheet(13/27 Pages) SEMTECH

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SC471/SC471A

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POWER MANAGEMENT

VOUT

D0/D1

RTN

750mV

(FB threshold)

Final

VOUT

Initial

VOUT

Voltage overshoot

VOUT

R3/R4

Figure 8

The overshoot can be approximated by the following

equation, where ICL is the current limit, V

FINAL is the desired

setpoint for the ﬁnal voltage, L is in μH and COUT is in μF.

VMAX = √( ICL2 • L/COUT + VFINAL2 )

This overshoot can be eliminated by using a small RC

circuit to smooth the voltage seen at FB, see Figure 9.

The presence of Rs/Cs will prevent the rapid changes at

D0/D1 from moving FB too quickly. The result is a gradual

change from VOUT

INITIAL to VOUTFINAL, which prevents the

build-up of high inductor current and reduces overshoot.

Note: Cs can be connected to either VOUT or GND. VOUT is

preferred because this results in higher ripple seen at the FB

pin, which improves stability.

RTN

750mV

(FB threshold)

Final

VOUT

Initial

VOUT

D0/D1

R3/R4

D0/D1

Figure 9

Note: that Rs/Cs are part of the FB resistor divider and therefore

affect the output voltage sensing. To minimize the effect of

this, select Rs and Cs according to the following guidelines:

The total of Rs + R3/R4 should be chosen to give the

correct total resistance needed to adjust VOUT. Set RS

= R3/R4.

Cs should be chosen to give a time constant equal to

approximately 18μsec for 325 kHz operation. Note that

Cs is charging through a resistive network composed of

Rs/R1/R2/R3/R4. The effective resistance seen by Cs

is equal to the parallel combination of (R1 + Rs) and R3

or R4. For example, if the values for R1/R2/Rs/R3 are

10K/50K/18.7K/18.7K, then the effective resistance for

(10K + 18.7K) paralleled with 18.7K, which is 11.2K. To

set a time constant of 18μsec, CS should be approximately

18μsec/11.2k = 1600pF.

Applications Information (continued)

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