CMS6416LAH datasheet(11/46 Pages) FIDELIX

11 / 46 page

Rev1.3, Nov. 2005

CMS6416LAx-75xx

EXTENDED MODE REGISTER

The Extended Mode Register controls additional functions such

as the Temperature Compensated Self Refresh (TCSR) Control,

Partial Array Self Refresh (PASR), and Output Drive

Strength.The Extended Mode Register is programmed via the

Mode Register Set command (BA1=1, BA0=0) and retains the

stored information until it is programmed again or the device

loses power. The Extended Mode Register must be

programmed with M8 through M11 set to “0”. The Extended

Mode Register must be loaded when all banks are idle and no

bursts are in progress, and the controller must wait the

specified time initiating any subsequent operation. Violating

either of these requirements results in unspecified operation.

AUTO TEMPERATURE COMPENSATED SELF REFRESH

Every cell in the DRAM requires refreshing due to the capacitor

losing its charge over time. The refresh rate is dependent on

temperature. At higher temperatures a capacitor loses charge

quicker than at lower temperatures, requiring the cells to be

refreshed more often. In order to save power consumption,

according to the temperature, Mobile-SDRAM includes the

internal temperature sensor and control units to control the self

refresh cycle automatically.

PARTIAL ARRAY SELF REFRESH

The Partial Array Self Refresh (PASR) feature allows the

controller to select the amount of memory that will be refreshed

during SELF REFRESH. The refresh options are all banks

(banks 0, 1, 2, and 3); two banks(banks 0 and 1 or 2 and 3 by

M7); and one bank (bank 0 or 2 by M7). WRITE and READ

commands occur to any bank selected during standard

operation, but only the selected banks in PASR will be

refreshed during SELF REFRESH. The data in banks 2 and 3

will be lost when the two bank option with M7=0 is used.

Similarly the data will be lost in banks 1, 2, and 3 when the one

bank option with M7=0 is used down

Driver Strength Control

The driver strength feature allows one to reduce the drive

strength of the I/O’s on the device during low frequency

operation. This allows systems to reduce the noise associated

with the I/O’s switching.

Bank

Up/Down

All must be set to ‘0’

Driver Strength

EM6-

EM5-

EM4-

EM3-

PASR

EM2-

EM1-

EM9-

EM8-

EM7-

EM0-

EM10-

A10

EM11-

A11

EM12-

BA0

EM13-

BA1

Table 4. Extended Mode Register Definition

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