 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT90USB646 Datasheet(PDF) 147 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT90USB646 Datasheet(HTML) 147 Page - ATMEL Corporation |
|
|
147 / 459 page  147 7593H–AVR–11/08 ATmega32U6/AT90USB64/128 14.10.18 Timer/Counter3 Interrupt Mask Register – TIMSK3 • Bit 5 – ICIEn: Timer/Countern, Input Capture Interrupt Enable When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally enabled), the Timer/Countern Input Capture interrupt is enabled. The corresponding Interrupt Vector (See “Interrupts” on page 68.) is executed when the ICFn Flag, located in TIFRn, is set. • Bit 3 – OCIEnC: Timer/Countern, Output Compare C Match Interrupt Enable When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally enabled), the Timer/Countern Output Compare C Match interrupt is enabled. The corresponding Interrupt Vector (See “Interrupts” on page 68.) is executed when the OCFnC Flag, located in TIFRn, is set. • Bit 2 – OCIEnB: Timer/Countern, Output Compare B Match Interrupt Enable When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally enabled), the Timer/Countern Output Compare B Match interrupt is enabled. The corresponding Interrupt Vector (See “Interrupts” on page 68.) is executed when the OCFnB Flag, located in TIFRn, is set. • Bit 1 – OCIEnA: Timer/Countern, Output Compare A Match Interrupt Enable When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally enabled), the Timer/Countern Output Compare A Match interrupt is enabled. The corresponding Interrupt Vector (See “Interrupts” on page 68.) is executed when the OCFnA Flag, located in TIFRn, is set. • Bit 0 – TOIEn: Timer/Countern, Overflow Interrupt Enable When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally enabled), the Timer/Countern Overflow interrupt is enabled. The corresponding Interrupt Vector (See “Interrupts” on page 68.) is executed when the TOVn Flag, located in TIFRn, is set. 14.10.19 Timer/Counter1 Interrupt Flag Register – TIFR1 14.10.20 Timer/Counter3 Interrupt Flag Register – TIFR3 • Bit 5 – ICFn: Timer/Countern, Input Capture Flag Bit 765 43 2 1 0 – –ICIE3 –OCIE3 C OCIE3B OCIE3A TOIE3 TIMSK3 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 765 43 210 – –ICF1 – OCF1C OCF1B OCF1A TOV1 TIFR1 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 000 00 000 Bit 765 43 210 – –ICF3 – OCF3C OCF3B OCF3A TOV3 TIFR3 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 000 00 000 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
