ON-LINE MASTER PHASE TIMING

OC0-OC1

OFL

DS

READY

BUSY

RD

I0-I7

INP 0

INP 1

INP N

O0-O10

O11

OUT 0

OUT 1

OUT N

ADDR 0

ADDR 1

ADDR N

WAIT

OUT N-1

ADDR N-1

T

4

T

5

T

6

T

7

T

8

T

3

T

2

T

3

T

1

T

9

T

10

T

10

T

11

Symbol

Mode

Parameter

Min

Typ

Max

Unit

On-Line

Master

OFL Low

to first RD High

3

Clock

Pulses

On-Line

Master

RD High

to READY High

2

Clock

Pulses

On-Line

Master

OFL/BUSY Low

to O11 Pulse

10

Clock

Pulses

On-Line

Master

RD High

to next RD High

10

Clock

Pulses

On-Line

Master

READY High

to BUSY High

1

Clock

Pulses

(1)

On-Line

Master

BUSY High

to first Output Ready

64

Clock

Pulses

(1)

On-Line

Master

DS High

to next DS High

64

Clock

Pulses

On-Line

Master

WAIT Low

to next Output Valid

32

Clock

Pulses

On-Line

Master

Elaboration

Time

see fig.6

Clock

Pulses

On-Line

Master

DS Pulse Width

5

Clock

Pulses

On-Line

Master

LAST DS Pulse Width

1

Clock

Pulses

Table 13. On-Line Master Timing Parameters

Note 1. It depends on the number of rules related to the current output variable. Each output variable needs at least two

rules and each rule requires 32 clock pulses.

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W.A.R.P.2.0