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AT91SAM9261 Datasheet(PDF) 8 Page - ATMEL Corporation |
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AT91SAM9261 Datasheet(HTML) 8 Page - ATMEL Corporation |
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8 / 43 page  8 6062KS–ATARM–15-Jan-09 AT91SAM9261 Preliminary Two-Wire Interface TWD Two-wire Serial Data I/O TWCK Two-wire Serial Clock I/O LCD Controller LCDD0 - LCDD23 LCD Data Bus Output LCDVSYNC LCD Vertical Synchronization Output LCDHSYNC LCD Horizontal Synchronization Output LCDDOTCK LCD Dot Clock Output LCDDEN LCD Data Enable Output LCDCC LCD Contrast Control Output USB Device Port DDM USB Device Port Data - Analog DDP USB Device Port Data + Analog USB Host Port HDMA USB Host Port A Data - Analog HDPA USB Host Port A Data + Analog HDMB USB Host Port B Data - Analog HDPB USB Host Port B Data + Analog Table 3-1. Signal Description by Peripheral (Continued) Signal Name Function Type Active Level Comments |
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