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TELCOM SEMICONDUCTOR, INC.

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Figure 1. TC70 Typical Application

VCC

CE

WDD

VCCO

CEO

TC70

ADDRESS

DECODER

ADDRESS

CMOS

RAM

I/O

RESET

RESET

PROCESSOR

+5V

BATTERY

R2

13K

R1

10K

+5V

VBATT

VCC

GND

CEI

RS

data corruption during power up and power down. The

and connects VCCO to whichever is higher. Switchover

battery switchover comparator has 20mV of hysteresis to

Integrated Battery Backup (TC71)

The TC71 differs from the TC70 in that it has a Power

Fail (PF) output instead of a gated chip enable (CEI, CEO).

PF must be externally gated with the decode for the CMOS

RAM or other device to be battery-backed. (Many CMOS

RAMs have both CE and CE enables. In this case, the PF

output can be connected directly to the CE input of the RAM).

Battery switchover for the TC71 is otherwise identical to that

of the TC70.

Supply Monitor Noise Sensitivity

The TC70/71 is optimized for fast response to negative-

may require a 0.1

µF bypass capacitor to reduce detection

sensitivity. This capacitor should be installed as close to the

TC70/71 as possible to keep the capacitor lead length short.

TYPICAL APPLICATIONS

Figure 1 shows a full feature implementation of the

TC70; Figure 2 shows the TC71. Resistors R1 and R2 of

Figure 2 set the trip point voltage for the early power fail

warning circuit using the TC71 threshold detector.

Resistor Value Selection

The values of R1 and R2 must be chosen to ensure a

line is low. The use of 10k

Ω, ±5% tolerance resistors are

recommended. These values result in a nominal strobe level

of 2.83V on RS (min/max of 2.43V/3.24V, assuming

long as the additive tolerances of the power supply and

External Override Reset Control

A built-in debounce circuit allows a pushbutton switch

(or other electronic reset signal) to be wire-ORed to RS as

an external reset override (Figure 4). The external reset

signal is required to be an active low signal of at least

20msec in duration. Internally, this input is timed to provide

a minimum reset pulse width output of 500msec.

Threshold Detector

The TC71 issues a low-true output on the TDO pin any

input through a simple resistor divider. The threshold detec-

tor can be used to generate an early power fail warning if the

unregulated DC input to the +5V regulator is available for

monitoring.

Integrated Battery Backup (TC70)

The CEO line (TC70) drives the CE input of a CMOS

RAM or other device to be battery-backed. CEO follows CEI

below 4.5V nominal, CEO is driven to the potential of VCCO

thus write protecting the RAM and preventing accidental

TC70

TC71

MICROMASTER™ – SYSTEM SUPERVISOR

WITH POWER SUPPLY MONITOR, WATCHDOG

AND BATTERY BACKUP