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LT3085EDCB-PBF Datasheet(PDF) 16 Page - Linear Technology

Part # LT3085EDCB-PBF
Description  Adjustable 500mA Single Resistor Low Dropout Regulator
PDF  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT3085EDCB-PBF Datasheet(HTML) 16 Page - Linear Technology

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from junction to ambient. This includes junction-to-case,
case-to-heat sink interface, heat sink resistance or circuit
board-to-ambient as the application dictates. Additional
heat sources nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heat sinks and
plated through-holes can also be used to spread the heat
generated by power devices. Boards specified in thermal
resistance tables have no vias on plated through-holes
from topside to backside.
Junction-to-case thermal resistance is specified from
the IC junction to the bottom of the case directly below
the die. This is the lowest resistance path for heat flow.
Proper mounting is required to ensure the best possible
thermal flow from this area of the package to the heat
sinking material. Note that the Exposed Pad is electrically
connected to the output.
The following tables list thermal resistance for several
different copper areas given a fixed board size. All mea-
surements were taken in still air on two-sided 1/16” FR-4
board with one ounce copper.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Although Tables
2 and 3 provide thermal resistance numbers for 2-layer
board with 1 ounce copper, modern multi-layer PCBs
provide better performance than found in these tables.
For example, a 4-layer, 1 ounce copper PCB board with
5 thermal vias from the DFN or MSOP exposed backside
pad to inner layers (connected to VOUT) achieves 40°C/W
thermal resistance. Demo circuit 1401A’s board layout
achieves this 40°C/W performance. This is approximately
a 45% improvement over the numbers shown in Tables
2 and 3.
APPLICATIONS INFORMATION
Table 2. MSE Package, 8-Lead MSOP
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE*
BACKSIDE
BOARD AREA
2500mm2
2500mm2
2500mm2
55°C/W
1000mm2
2500mm2
2500mm2
57°C/W
225mm2
2500mm2
2500mm2
60°C/W
100mm2
2500mm2
2500mm2
65°C/W
*Device is mounted on topside
Table 3. DCB Package, 6-Lead DFN
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE*
BACKSIDE
BOARD AREA
2500mm2
2500mm2
2500mm2
68°C/W
1000mm2
2500mm2
2500mm2
70°C/W
225mm2
2500mm2
2500mm2
73°C/W
100mm2
2500mm2
2500mm2
78°C/W
*Device is mounted on topside
For future information on the thermal resistance and using thermal
information, refer to JEDEC standard JESD51, notably JESD51-12.
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, a VCONTROL
voltage of 3.3V ±10%, an IN voltage of 1.5V ±5%, output
current range from 1mA to 0.5A and a maximum ambi-
ent temperature of 50°C, what will the maximum junction
temperature be for the DFN package on a 2500mm2 board
with topside copper area of 500mm2?
The power in the drive circuit equals:
PDRIVE = (VCONTROL – VOUT)(ICONTROL)
where ICONTROL is equal to IOUT/60. ICONTROL is a function
of output current. A curve of ICONTROL vs IOUT can be found
in the Typical Performance Characteristics curves.



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