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LT3430 Datasheet(PDF) 19 Page - Linear Technology

Part # LT3430
Description  High Voltage, 3A,200kHz/100kHz Step-Down Switching Regulators
PDF  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT3430 Datasheet(HTML) 19 Page - Linear Technology

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LT3430/LT3430-1
19
34301fa
THERMAL CALCULATIONS
Power dissipation in the LT3430/LT3430-1 chip comes
from four sources: switch DC loss, switch AC loss, boost
circuit current, and input quiescent current. The follow-
ing formulas show how to calculate each of these losses.
These formulas assume continuous mode operation, so
they should not be used for calculating efficiency at light
load currents.
Switch loss:
P
RI
V
V
tI
V
f
SW
SW OUT
OUT
IN
EFF
OUT
IN
=
() (
)
+
()( )( )
2
12
(/ )
(Note: Switching losses are less for the LT3430-1 oper-
ating at only 100kHz)
Boost current loss:
P
VI
V
BOOST
OUT
OUT
IN
=
()
2
36
/
Quiescent current loss:
PV
V
Q
IN
OUT
=
()+
()
0 0015
0 003
..
RSW = Switch resistance (≈ 0.15) hot
tEFF = Effective switch current/voltage overlap time
= (tr + tf + tIr + tIf)
tr = (VIN/1.2)ns
tf = (VIN/1.1)ns
tIr = tIf = (IOUT/0.2)ns
f = Switch frequency
Example: with VIN = 40V, VOUT = 5V and IOUT = 2A:
P
W
PW
PW
SW
BOOST
Q
= (
)() ()
+
()()()( )()
=+
=
= () () =
=+
=
−
015 2
5
40
90 10
1 2 2 40 200 10
008 072
08
52 36
40
004
40 0 0015
5 0 003
0 08
2
93
2
.
•/
•
..
.
/
.
(.
)
(.
)
.
Total power dissipation in the IC is given by:
PTOT = PSW + PBOOST + PQ
= 0.8W + 0.04W + 0.08W = 0.92W
Thermal resistance for the LT3430/LT3430-1 package is in-
fluenced by the presence of internal or backside planes.
TSSOP (Exposed Pad) Package: With a full plane under
the TSSOP package, thermal resistance will be about
45°C/W.
To calculate die temperature, use the proper thermal
resistance number for the desired package and add in
worst-case ambient temperature:
TJ = TA + (θJA • PTOT)
When estimating ambient, remember the nearby catch
diode and inductor will also be dissipating power:
P
VV
V
I
V
DIODE
F
IN
OUT
LOAD
IN
=
( )(
–
)(
)
VF = Forward voltage of diode (assume 0.52V at 2A)
PW
DIODE
==
(.
)(
– )( )
.
052 40 5 2
40
091
PINDUCTOR = (ILOAD)
2(RIND)
RIND = Inductor DC resistance (assume 0.1Ω)
PINDUCTOR (2)
2(0.1) = 0.4W
Only a portion of the temperature rise in the external
inductor and diode is coupled to the junction of the
LT3430. Based on empirical measurements, the thermal
effect on the LT3430 junction temperature due to power
dissipation in the external inductor and catch diode can
be calculated as:
∆TJ(LT3430) ≈ (PDIODE + PINDUCTOR)(5°C/W)
Using the example calculations for LT3430 dissipation, the
LT3430 die temperature will be estimated as:
TJ = TA + (θJA • PTOT) + [5 • (PDIODE + PINDUCTOR)]
With the TSSOP package (θJA = 45°C/W), at an ambient
temperature of 50°C:
TJ = 50 + (45 • 0.92) + (5 • 1.31) = 98°C
Die temperature can peak for certain combinations of VIN,
VOUT and load current. While higher VIN gives greater
switch AC losses, quiescent and catch diode losses, a
APPLICATIONS INFORMATION



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