2

8b10b D e v i ce R equi rem ents

Performance requirements of the 8b10b macro drives device

selection.

Table 1 defines the minimum device requirements

for the A54SXA family.

I / O S i gnal D e s c ri pt i ons

The 8b10b macro signals are defined in Tables 2 and 3.

8b10b T r ans m i t t er D e tai l ed

Oper ati o n

The 8b10b transmitter is a pipelined structure that converts

16-bit command or data information into two 10-bit encoded

values. Command and data information are qualified by the

TX_K_CHAR[1:0] bus. TX_K_CHAR[1] corresponds to the

upper data byte on TX_WORD[15:0] and TX_K_CHAR[0] is

for the lower byte. The data on the TX_WORD bus is

continuously registered into the transmitter; however, this

data is only transferred to the encoder when the TX_WRn

signal is driven low for a single cycle. The transmitter will

encode and send the upper byte first followed by the lower

byte. Because of the pipelined nature of the transmitter, the

first encoded data will be driven on the TX_DATA bus several

cycles after the TX_WRn pulse. All data input information is

valid, though command possibilities are limited. If the

transmitter detects a bad command, then it will assert the

INVALID_K signal. When the TX_WRn input is inactive, the

transmitter will continuously send an IDLE2 (K28.5/D16.2)

command defined in the 802.3 specification.

Figure 2 on

page 3 illustrates the implementation of the transmitter

function.

The core of the transmitter consists of a data encoder, a

command encoder, and a disparity calculator. Each encoder

calculates a 4B and 6B code for the input data. The correct

code, command or data, is then selected based on the original

input value of TX_K_CHAR. The disparity calculator

determines whether encoded values need to be inverted to

maintain the correct running disparity. Finally, the code is

registered and sent to the transceiver on the TX_DATA bus.

8b10b R ecei v e r D e t a i l ed Operat i o n

The 8b10 receiver is also a pipelined structure that converts

two 10-bit encoded values qualified by the clocks RBC0 and

RBC1 and converts them to 16-bit command or data

information. Command information is indicated by the

RX_K_CHAR[1:0] bus signals asserted high. The data on the

upper byte of the RX_WORD bus is the first decoded value in

the sequence.

Several signals qualify the validity of the information on

RX_WORD. RX_WORD contains good information whenever

CODE_ERRORn is inactive (high) and WORD_SYNCn is

active (low). If WORD_SYNCn is high or CODE_ERRORn is

low, this indicates some problem in transmission. Whenever

the receiver loses sync (WORD_SYNCn is high), it asserts the

COMMA_DET_EN

output

so

that

the

transceiver

resynchronizes the data on subsequent K28.5 commands.

When sync is reestablished, the WORD_SYNCn will again be

driven low after the pipeline has been flushed of potentially

bad data.

Figure 3onpage 4 illustrates the implementation

of the 8b10b receive function.

Receive data is first loaded into two parallel registers. The

first register is active on the rising edge of RBC0 and the

second on the rising edge of RBC1. The RBC0 data is then

Table 1 • Device Statistics for the 8b10b Macro

Device

Speed Grade

Utilization

A54SX08A

Standard

96%

A54SX16A

Standard

48%

A54SX32A

-1

24%

Table 2 • Transceiver Interface Signals

Type

Description

COMMA_DETECT

Input

Active high pulse from the transceiver indicating that a comma character has

been detected and the received data is aligned with the rising edge of the

RBC1 clock.

RBC0, RBC1

Input

Clock signals recovered from the received data stream. These clocks are 180

degrees out of phase and the rising edge of each clock qualifies receive data.

RX_DATA[9:0]

Input

10-bit encoded input data from the transceiver qualified by the rising edges of

RBC0 and RBC1.

COMMA_DET_EN

Output

Active high signal indicating that the transceiver should align the data stream

with the rising edge of RBC1. This output is asserted when the 8b10b detects

multiple consecutive encoding errors.

TX_DATA[9:0]

Output

10-bit encoded output data to the transceiver.

Note:

1.

Active LOW signals are designated with a trailing lower-case n.