LTC1043CSW datasheet(5/16 Pages) LINER

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LTC1043

1043fa

Test Circuit 1. Leakage Current Test

Common Mode Rejection Ratio (CMRR)

The LTC1043, when used as a differential to single-ended

converter rejects common mode signals and preserves

differential voltages (Figure 1). Unlike other techniques,

the LTC1043’s CMRR does not degrade with increasing

common mode voltage frequency. During the sampling

mode, the impedance of Pins 2, 3 (and 11, 12) should be

reasonably balanced, otherwise, common mode signals

will appear differentially. The value of the CMRR depends

on the value of the sampling and holding capacitors

(CS, CH) and on the sampling frequency. Since the

common mode voltages are not sampled, the

common mode signal frequency can well exceed the

sampling frequency without experiencing aliasing

phenomena. The CMRR of Figure 1 is measured by

TEST CIRCUITS

Test Circuit 2. RON Test

Test Circuit 3. Oscillator Frequency, fOSC

Test Circuit 4. CMRR Test

LTC1043 • TC02

(7, 13, 6, 18)

(8, 14, 5, 15)

(11, 12, 2, 3)

100µA to 1mA

CURRENT SOURCE

VIN

V+

LTC1043 • TC03

V–

(TEST PIN)

LTC1043

COSC

LTC1043 • TC04

CMRR = 20 LOG

()

FOR OPTIMUM CMRR, THE COSC SHOULD

BE LARGER THAN 0.0047µF, AND

THE SAMPLING CAPACITOR ACROSS

PINS 11 AND 12 SHOULD BE PLACED

OVER A SHIELD TIED TO PIN 10

V– ≤ VCM ≤ V

VCM

VOUT

1µF

CAPACITORS ARE

NOT ELECTROLYTIC

NOTE:

APPLICATIO S I FOR ATIO

Figure 1. Differential to Single-Ended Converter

LTC1043 • TC01

(7, 13, 6, 18)

(8, 14, 5, 15)

(11, 12, 2, 3)

NOTE: TO OPEN SWITCHES,

S1 AND S3

SHOULD BE CONNECTED

TO V–. TO OPEN S2, S4,

COSC PIN SHOULD BE

TO V+ COSC

0V TO 10V

LTC1043 • AI01

CS, CH ARE MYLAR OR POLYSTRENE

C–

C+

1/2 LTC1043

VCM

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