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EP550 Datasheet(PDF) 1 Page - Actel Corporation |
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EP550 Datasheet(HTML) 1 Page - Actel Corporation |
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1 / 3 page ![]() Copyright © by Eureka Technology Inc. 4962 El Camino Real, Los Altos, CA 94022, USA Tel: 1 650 960 3800 Fax: 1 650 960 3805 http://www.eurekatech.com Page 1 Eureka Technology EP550 SDIO/SD Memory/MMC Host Controller FEATURES • Host controller for Secure Digital (SD), SDIO, SD combo, and MultiMedia Card (MMC) bus. • Allows host CPU to access SD and MMC devices. • Compatible with SD 2.0, including high capacity (SDHC) and 8-bit MMC 4.2 specifications. • Many choices of CPU interfaces, including AHB, APB, SH4, Wishbone, PCI and generic user interface. • Supports SDMA operation with option to remove SDMA for very small gate count implementation. • Selectable data buffer size from 512 to 16Kbytes. • Hardware support of CRC error detection and interrupt generation. • Supports multi-function SD cards including command suspend, resume, and read wait. • Option to operate user interface and card control at different clock domains. • Supports all SD-enabled operating systems including Windows. • Free source code included for bus driver development. • Fully sythesizable code ideal for ASIC and FPGA implementations. • Fully static design with edge triggered flip-flops. BLOCK DIAGRAM Bus Bus Slave Master SD Host Control Control Registers DMA Control (Optional) Data Buffer Optional Interface Standard CPU or Generic user interface SD card Interface Product Summary |
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