1

LTC1747

1747fa

BLOCK DIAGRA

APPLICATIO S

FEATURES

DESCRIPTIO

12-Bit, 80Msps Low Noise ADC

s

Sample Rate: 80Msps

s

72dB SNR and 85dB SFDR (3.2V Range)

s

70.5dB SNR and 87dB SFDR (2V Range)

s

Pin Compatible with 14-Bit 80Msps LTC1748

s

No Missing Codes

s

Single 5V Supply

s

Power Dissipation: 1.4W

s

Selectable Input Ranges:

±1V or ±1.6V

s

240MHz Full Power Bandwidth S/H

s

Pin Compatible Family

25Msps: LTC1746 (14-Bit), LTC1745 (12-Bit)

50Msps: LTC1744 (14-Bit), LTC1743 (12-Bit)

65Msps: LTC1742 (14-Bit), LTC1741 (12-Bit)

80Msps: LTC1748 (14-Bit), LTC1747 (12-Bit)

s

48-Pin TSSOP Package

s

Telecommunications

s

Receivers

s

Cellular Base Stations

s

Spectrum Analysis

s

Imaging Systems

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LTC

verter designed for digitizing high frequency, wide dy-

namic range signals. Pin selectable input ranges of

±1V

and

±1.6V along with a resistor programmable mode

allow the LTC1747’s input range to be optimized for a wide

variety of applications.

The LTC1747 is perfect for demanding communications

applications with AC performance that includes 72dB

SNR and 85dB spurious free dynamic range. Ultralow jitter

excellent noise performance. DC specs include

±1.5 LSB

INL and

±0.8LSB DNL over temperature.

The digital interface is compatible with 5V, 3V, 2V and

LVDS logic systems. The ENC and ENC inputs may be

driven differentially from PECL, GTL and other low swing

logic families or from single-ended TTL or CMOS. The low

noise, high gain ENC and ENC inputs may also be driven

by a sinusoidal signal without degrading performance. A

separate output power supply can be operated from 0.5V

to 5V, making it easy to connect directly to any low voltage

DSPs or FIFOs.

The TSSOP package with a flow-through pinout simplifies

the board layout.

80Msps, 12-Bit ADC with a 2V Differential Input Range

12-BIT

PIPELINED ADC

12

S/H

AMP

±1V

DIFFERENTIAL

ANALOG INPUT

+

–

SENSE

4.7

µF

DIFF AMP

REFLA

REFHB

GND

1747 BD

ENC

4.7

µF

1

µF1µF

0.1

µF

0.1

µF

REFHA

REFLB

BUFFER

RANGE

SELECT

CORRECTION

LOGIC AND

SHIFT

REGISTER

OUTPUT

LATCHES

CONTROL LOGIC

OGND

0.5V

TO 5V

5V

0.1

µF

1

µF

1

µF

1

µF

D11

D0

CLKOUT

OF

•

•

•

ENC

DIFFERENTIAL

ENCODE INPUT

OE

MSBINV

0.1

µF