LTM4606MPV datasheet(8/24 Pages) LINER

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LTM4606

4606f

BLOCK DIAGRAM

COMP (Pins A11, D11): Current Control Threshold and Er-

ror Ampliﬁer Compensation Point. The current comparator

threshold increases with this control voltage. The voltage

ranges from 0V to 2.4V with 0.7V corresponding to zero

sense voltage (zero current).

PGOOD (Pin G12): Output Voltage Power Good Indicator.

Open-drain logic output that is pulled to ground when the

output voltage is not within ±10% of the regulation point,

after a 25μs power bad mask timer expires.

RUN (Pins A10, B9): Run Control Pins. A voltage above

1.9V will turn on the module, and below 1V will turn off

the module. A programmable UVLO function can be ac-

complished with a resistor from VIN to this pin that has a

5.1V zener to ground. Maximum pin voltage is 5V.

PIN FUNCTIONS

DECOUPLING REQUIREMENTS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

CIN

External Input Capacitor Requirement

(VIN = 4.5V to 28V, VOUT = 2.5V)

IOUT = 6A

μF

COUT

External Output Capacitor Requirement

(VIN = 4.5V to 28V, VOUT = 2.5V)

IOUT = 6A

100

200

μF

TA = 25°C. Use Figure 1 conﬁguration.

INTERNAL

COMP

SGND

COMP

PGOOD

RUN

>1.9V = ON

<1V = OFF

MAX = 5V

MARG1

MARG0

MPGM

FCB

PLLIN

CSS

INTVCC

DRVCC

TRACK/SS

VFB

fSET

50k

41.2k

RFB

19.1k

50k

60.4k

VOUT

5.1V

ZENER

POWER CONTROL

VIN

4.5V TO 28V

VOUT

2.5V

AT 6A

50k

22μF

1.5μF

CIN

COUT

PGND

4606 F01

10k

4.7μF

INPUT

FILTER

NOISE

CANCEL-

LATION

Figure 1. Simpliﬁed Block Diagram

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