6

LTC3726

3726fb

PI FU CTIO S

SG (Pin 1): Gate Drive for the “Synchronous” MOSFET.

FG (Pin 2): Gate Drive for the “Forward” MOSFET.

maximum duty cycle at either 50% or 75% respectively.

Tie to ground through either a 200k or 100k resistor (50%

or 75% maximum duty cycle) to disable pulse encoding.

In this mode, normal PWM signals will be generated at the

FB/PHASE (Pin 4): Inverting input of the main loop Error

Amplifier and Control Input to the Phase Selector. In

PolyPhase

not needed) this pin is used to determine the phasing of the

controller CLK relative to the synchronizing signal at the

FS/SYNC pin.

ITH (Pin 5): The Output of the Main Loop Error Amplifier.

Place compensation components between the ITH pin

and GND.

RUN/SS (Pin 6): Combination Run Control and Soft-Start

Inputs. A capacitor to ground sets the ramp time of the

output voltage. Holding this pin below 0.4V causes the IC

to shut down all internal circuitry.

SLP (Pin 7): Slope Compensation Input. Place a single

resistor to ground to set the desired amount of slope

compensation.

GND (Pin 8): Signal Ground.

FS/SYNC (Pin 9): Combination Frequency Set and SYNC

respec-tively. Place a single resistor to ground at this pin

to set the frequency between 75kHz and 500kHz. To

synchronize, drive this pin with a clock signal to achieve

PLL synchronization from 75kHz to 500kHz. Sources

20

µA of current.

When using current sense transformers, this pin may be

mum current trip level.

Connect to the positive end of a current sense resistor or

to the output of a current sense transformer.

SW (Pin 12): Connect to the drain of the “synchronous”

MOSFET. This input is used for adaptive shoot-through

prevention and leading edge blanking.

PGND (Pin 13): Gate Driver Ground Pin.

puts. For most applications, these connect to a pulse

transformer (with a series DC blocking capacitor). The

PWM information is multiplexed together with DC power

and sent through a single pulse transformer to the primary

side. This information may be decoded by the LTC3705

gate driver and primary-side controller.

Circuitry.

PolyPhase is a registered trademark of Linear Technology Corporation.