AD7524M

Advanced LinCMOS

™ 8-BIT MULTIPLYING

DIGITAL-TO-ANALOG CONVERTER

SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995

4

POST OFFICE BOX 655303

OUT1 and OUT2 at GND (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VDD = 5 V

VDD = 15 V

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

IIH

High level input current

VI =VDD

Full-range

10

10

µA

IIH

High-level input current

VI = VDD

25

°C

1

1

µA

IIL

Low level input current

VI =0

Full-range

–10

–10

µA

IIL

Low-level input current

VI = 0

25

°C

–1

–1

µA

OUT1

DB0–DB7 at 0,

WR and CS at 0 V

Full-range

±400

±200

I k

Output leakage

Vref = ±10 V

25

°C

±50

±50

nA

Ipkg

g

current

OUT2

DB0–DB7 at VDD,

WR and CS at 0

Full-range

±400

±200

nA

Vref = ±10 V

25

°C

±50

±50

Quiescent

DB0–DB7 at VIHmin or VILmax

2

2

mA

IDD

Supply current

Standby

DB0 DB7 at0VorVDD

Full-range

500

500

µA

Standby

DB0–DB7 at 0 V or VDD

25

°C

100

100

µA

kSVS

Supply voltage sensitivity,

∆VDD = 10%

Full-range

0.16

0.04

%/%

kSVS

yg

y,

∆gain/∆VDD

∆VDD = 10%

25

°C

0.002

0.02

0.001

0.02

pF

Ci

Input capacitance, DB0–DB7,

WR, CS

VI = 0

5

5

pF

OUT1

DB0 DB7 at 0 WR and CS at0V

30

30

C

Output

OUT2

DB0–DB7 at 0, WR and CS at 0 V

120

120

pF

Co

capacitance

OUT1

DB0 DB7 at V

WR and CS at0V

120

120

pF

OUT2

DB0–DB7 at VDD, WR and CS at 0 V

30

30

Reference input impedance

(REF to GND)

5

20

5

20

k

Ω

OUT1 and OUT2 at GND (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VCC = 5 V

VDD = 15 V

UNIT

PARAMETER

TEST CONDITIONS

MIN

MAX

MIN

MAX

UNIT

Linearity error

±0.2

±0.2 %FSR

Gain error

See Note 1

Full range

±1.4

±0.6

%FSR

Gain error

See Note 1

25

°C

±1

±0.5

%FSR

Settling time (to 1/2 LSB)

See Note 2

100

100

ns

Propagation delay from digital input to

90% of final analog output current

See Note 2

80

80

ns

Feedthrough at OUT1 or OUT2

Vref = ± 10 V (100 kHz sinewave),

Full range

0.5

0.5

%FSR

Feedthrough at OUT1 or OUT2

ref

(),

WR and CS at 0,

DB0–DB7 at 0

25

°C

0.25

0.25

%FSR

Temperature coefficient of gain

TA = 25°C to tmin or tmax

±0.004

±0.001

%FSR/

°C

NOTES:

1. Gain error is measured using the internal feedback resistor. Nominal Full Scale Range (FSR) = Vref – 1 LSB.

2. OUT1 load = 100

Ω, Cext = 13 pF, WR at 0 V, CS at 0 V, DB0–DB7 at 0 V to VDD or VDD to 0 V.