CD74ACT297

DIGITAL PHASE-LOCKED LOOP

SCHS297A – AUGUST 1998 – REVISED SEPTEMBER 1999

9

POST OFFICE BOX 655303

φB

92CS-40451

φA1

XORPD OUT

Figure 6. Exclusive-OR Phase-Detector Waveforms

tTHL

tPHL

1/F max

I/D CLK

tPHL

I/D OUT

tTLH

50% VCC

tw

1.5 V

92CS-40452

1.5 V

50% VCC

10%

90%

3 V

0 V

VOL

≈VCC

Figure 7. Waveforms Showing Clock (ID CLK) to Output (ID OUT) Propagation Delays,

Clock Pulse Duration, and Maximum Clock Pulse Frequency

tPLH

92CS-43151

tPHL

tPLH

tPHL

φB

φA1

XORPD OUT

50% VCC

1.5 V

50% VCC

50% VCC

50% VCC

1.5 V

1.5 V

1.5 V

3 V

0 V

3 V

0 V

VOL

≈VCC

Figure 8. Waveforms Showing Phase Input (

φB, φA2) to Output (XORPD OUT) Propagation Delays