CD74ACT86E datasheet(4/5 Pages) TI

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Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 11)

ACT TYPES

Propagation Delay, Input to

Output

tPHL, tPLH

(Note 10)

3.8

13.3

3.7

14.6

Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 11)

NOTES:

8. Limits tested at 100%.

9. 3.3V Min at 3.6V, Max at 3V.

10. 5V Min at 5.5V, Max at 4.5V.

11. CPD is used to determine the dynamic power consumption per gate.

AC: PD = VCC

2 f

i (CPD + CL)

ACT: PD = VCC

2 f

i (CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.

Switching Speciﬁcations Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)

PARAMETER

SYMBOL

VCC (V)

-40oC TO 85oC

-55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

FIGURE 1.

90%

tr = 3ns

nA OR nB

tPLH

OUTPUT nY

tf = 3ns

10%

tPHL

DUT

OUTPUT

RL (NOTE)

OUTPUT

LOAD

500

Ω

50pF

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

FIGURE 2. PROPAGATION DELAY TIMES

ACT

Input Level

VCC

Input Switching Voltage, VS

0.5 VCC

1.5V

Output Switching Voltage, VS

0.5 VCC

CD74AC86, CD54/74ACT86

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