1

Data sheet acquired from Harris Semiconductor

SCHS155

Features

• Buffered Inputs

• Asynchronous Master Reset

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

Description

The Harris CD74HC164 and the CD74HCT164 are 8-bit

serial-in parallel-out shift registers with asynchronous reset.

Data is shifted on the positive edge of Clock (CP). A LOW on

the Master Reset (MR) pin resets the shift register and all

outputs go to the LOW state regardless of the input condi-

tions. Two Serial Data inputs (DS1 and DS2) are provided,

either one can be used as a Data Enable control.

Pinout

CD74HC164, CD74HCT164

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

PACKAGE

PKG.

NO.

CD74HC164E

-55 to 125

16 Ld PDIP

E14.3

CD74HCT164E

-55 to 125

16 Ld PDIP

E14.3

CD74HC164M

-55 to 125

16 Ld SOIC

M14.15

CD74HCT164M

-55 to 125

16 Ld SOIC

M14.15

NOTE:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die is available which meets all electrical

specifications. Please contact your local sales office or Harris

customer service for ordering information.

DS1

DS2

GND

MR

CP

1

2

3

4

5

6

7

14

13

12

11

10

9

8

October 1997

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright

CD74HC164,

CD74HCT164

High Speed CMOS Logic

8-Bit Serial-In/Parallel-Out Shift Register

File Number

1658.1

[ /Title

(CD74

HC164

,

CD74

HCT16

4)

/Sub-

ject

(High

Speed

CMOS

Logic

8-Bit

Serial-

In/Par-

allel-