CD74HC377 datasheet(1/7 Pages) TI

Part #	CD74HC377

Description	High Speed CMOS Logic Octal D-Type Flip-Flop with Data Enable

PDF	7 Pages

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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Data sheet acquired from Harris Semiconductor

SCHS184

Features

• Buffered Common Clock

• Buffered Inputs

• Typical Propagation Delay = 17ns at CL = 15pF,

VCC = 5V, TA = 25

oC

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at

VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

Description

The Harris CD74HC377 and CD74HCT377 are octal D-type

ﬂip-ﬂops with a buffered clock (CP) common to all eight ﬂip-

ﬂops. All the ﬂip-ﬂops are loaded simultaneously on the

positive edge of the clock (CP) when the Data Enable (E) is

Low.

Pinout

CD74HC377, CD74HCT377

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE (oC)

PACKAGE

PKG.

NO.

CD74HC377E

-55 to 125

20 Ld PDIP

E20.3

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

E

Q0

D0

D1

Q1

Q2

D3

D2

Q3

GND

VCC

D7

D6

Q6

Q7

Q5

D5

D4

Q4

CP

September 1997

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright

File Number

1675.1

CD74HC377,

CD74HCT377

High Speed CMOS Logic

Octal D-Type Flip-Flop with Data Enable

[ /Title

(CD74

HC377

,

CD74

HCT37

7)

/Sub-

ject

(High

Speed

CMOS

Logic

Octal

D-

Type

Flip-

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