CDC925

133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS

WITH 3-STATE OUTPUTS

SCAS633 – JULY 28, 1999

16

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

CPU

(internal)

PCI

(internal)

CPU_STOP

PCI_STOP

PWR_DOWN

PCI_F

(external)

PCI

(external)

Figure 6. PCI_STOP Timing

CPU

(internal)

PCI

(internal)

PWR_DOWN

PCI

(external)

CPU

(external)

VCO

CRYSTAL

NOTE A: Shaded sections on the VCO and Crystal waveforms indicate that the VCO and crystal oscillators are active and there is a valid clock.

Figure 7. Power-Down Timing