3

Applicatio n

Note s

PT7750 Series

More Application Notes

Pin-Coded Output Voltage Adjustment on the

“Big Hammer III” Series ISRs

Power Trends PT7750 series ISRs incorporating pin-coded

voltage control, use pins 1, 2, 3, 4, & 6 to adjust the ouput volt-

age. The control pins are identified VID0 - VID4 respectively.

When the control pins are left open-circuit, the ISR output will

regulate at its factory trimmed output voltage. Each control pin

is internally connected to a precision resistor, and when

grounded increases the output voltage by a set amount. The

internal resistors are binary code weighted, allowing the output

voltage of the ISR to be programmed as a function of a binary

code. VID0 represents the LSB, and VID4 the MSB (or range

change bit). The output voltage ranges offered by these regula-

tors are compatible with some microprocessors, and provide a

convenient method of output voltage selection for many other

applications. Refer to Figure 1 below for the connection sche-

matic, and the PT7750 Data Sheet for the programming code

information.

Notes:

1. The programming convention is as follows:-

Logic 0:

Connect to pin12 (Remote Sense Ground).

Logic 1:

Open circuit/open drain (See notes 2, & 4)

2. Do not connect pull-up resistors to the voltage program-

ming pins.

3. To minimize output voltage error, always use pin 12 (Re-

mote Sense Ground) as the logic “0” reference. While the

regular ground (pins 13-19) can also be used for program-

ming, doing so will degrade the load reglation of the

product.

Figure 1

4. If active devices are used to ground the voltage control pins,

low-level open drain MOSFET devices should be used over

introduces errors in the device’s internal divider network.

Discrete transistors such as the BSS138, 2N7002,

IRLML2402, or the 74C906 hex open-drain buffer are

examples of appropriate devices.

Active Voltage Programming:

Special precautions should be taken when making changes to the

voltage control progam code while the unit is powered. It is

highly recommended that the ISR be either powered down or in

abled induces high current transients through the device. This is

the result of the electrolytic output capacitors being either

charged or discharged to the new output voltage set-point. The

transient current can be minimized by making only incremental

changes to the binary code, i.e. one LSB at a time. A minimum

of 100µs settling time between each program state is also recom-

mended. Making non-incremental changes to VID3 and VID4

with the output enabled is discouraged. If they are changed, the

transients induced can overstress the device resulting in a perma-

nent drop in efficiency. If the use of active devices prevents the

program code being asserted prior to power-up, pull pin 5

(STBY) to the device GND during the period that the input

device output to execute a soft-start power-up to the pro-

grammed voltage.

Cout

+

Cin

+

1

µH

(Optional)

+24V

COM

STBY

L

O

A

D

PT7750

6

4

3

2

1

26

20-25

12

5

13-19

27

7-11

Vo

Vin

GND

SNS(+)

SNS(-)

Synch

Out

STBY

VID4 - VID0