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HC1S80 Datasheet(PDF) 16 Page - Altera Corporation |
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HC1S80 Datasheet(HTML) 16 Page - Altera Corporation |
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16 / 110 page ![]() 2–10 Altera Corporation September 2008 Document Revision History 1 Some HARDCOPY_FPGA_PROTOTYPE devices, as indicated in Table 2–8, have fewer M-RAM blocks compared to the equivalent Stratix FPGAs. The selective removal of these resources provides a significant price benefit to designers using HardCopy Stratix devices. f For more information about how the various features in the Quartus II software can be used for designing HardCopy Stratix devices, refer to the Quartus II Support for HardCopy Stratix Devices chapter of the HardCopy Series Handbook. HARDCOPY_FPGA_PROTOTYPE FPGA devices have the identical speed grade as the equivalent Stratix FPGAs. However, HardCopy Stratix devices are customized and do not have any speed grading. HardCopy Stratix devices, on an average, can be 50% faster than their equivalent HARDCOPY_FPGA_PROTOTYPE devices. The actual improvement is design-dependent. Document Revision History Table 2–9 shows the revision history for this chapter. Table 2–8. M-RAM Block Comparison Between Various Devices Number of LEs HARDCOPY_FPGA_PROTOTYPE Devices HardCopy Stratix Devices Stratix Devices Device M-RAM Blocks Device M-RAM Blocks Device M-RAM Blocks 25,660 EP1S25 2 HC1S25 2 EP1S25 2 32,470 EP1S30 2 HC1S30 2 EP1S30 4 41,250 EP1S40 2 HC1S40 2 EP1S40 4 57,120 EP1S60 6 HC1S60 6 EP1S60 6 79,040 EP1S830 6 HC1S830 6 EP1S830 9 Table 2–9. Document Revision History (Part 1 of 2) Date and Document Version Changes Made Summary of Changes September 2008 v3.4 Revised chapter number and metadata. — June 2007 v3.3 ● Updated Table 2–1. ● Added note to the “Embedded Memory” section. ● Updated the “Hot Socketing” section. — |
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