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EDR515CFJS Datasheet(PDF) 4 Page - JDS Uniphase Corporation |
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EDR515CFJS Datasheet(HTML) 4 Page - JDS Uniphase Corporation |
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4 / 7 page ![]() 4 ACCESS PIN-TIA RECEIVERS FOR 155 MB/S AND 622 MB/S Electrical Schematics Pin TIA 1 Output 3,4 GND (Case) 2 Vcc 1 Output 4 GND (Case) 3 V cc 2 V pd TIA 4 GND (Case) Pin TIA 1 Output 3 Vcc 2 Output B EDR 512C, EDR 515C EDR 512B, EDR 515B EDR 512D, EDR 515D Access to photodiode current is provided. Differential output is provided. Typical Low Pass Noise Filter Design for 155 Mb/s and 622 Mb/s NOISE FILTER PIN - TIA TIA 0.1 µF 0.1 µF 10 µF +V cc hv NOISE FILTER PIN - TIA TIA 0.1 µF 0.1 µF 10 µF +V cc hv V out 0.1 µF 10 µF V PD +5V 100-1K Ω V out V out B 0.1 µF NOISE FILTER PIN - TIA TIA 0.1 µF 0.1 µF 10 µF +V cc hv V out L1 C1 C2 L1 C1 C2 C1 C2 L1 L2 EDR 512C, EDR 515C EDR 512B, EDR 515B EDR 512D, EDR 515D Model L1L2C1 C2 EDR 512B 150 nH - 27 pF 27 pF EDR 512C 150 nH - 27 pF 27 pF EDR 512D 120 nH 120 nH 18 pF 18 pF EDR 515B 33 nH - 10 pF 10 pF EDR 515C 33 nH - 10 pF 10 pF EDR 515D 30 nH 30 nH 5.6 pF 5.6 pF |
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