SN54HC563, SN74HC563

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

SCLS145B – DECEMBER 1982 – REVISED MAY 1997

1

POST OFFICE BOX 655303

Lines Directly or up to 15 LSTTL Loads

Small-Outline (DW) and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

description

These 8-bit transparent D-type latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads.

They

are

particularly

suitable

for

implementing

buffer

registers,

I/O

ports,

bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the

Q outputs follow the complements of the data (D)

inputs. When LE is taken low, the outputs are

latched at the inverses of the levels set up at the

D inputs.

A buffered output-enable (OE) input places the

eight outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. In

the high-impedance state, the outputs neither

load nor drive the bus lines significantly. The

high-impedance state and increased high logic

level provide the capability to drive bus lines

without interface or pullup components.

OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while

the outputs are in the high-impedance state.

The SN54HC563 is characterized for operation over the full military temperature range of – 55

°C to 125°C. The

SN74HC563 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

OE

LE

D

Q

L

H

H

L

L

HL

H

L

LX

Q0

H

X

X

Z

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OE

1D

2D

3D

4D

5D

6D

7D

8D

GND

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

LE

SN54HC563 ...J OR W PACKAGE

SN74HC563 . . . DW OR N PACKAGE

(TOP VIEW)

32 1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

2Q

3Q

4Q

5Q

6Q

3D

4D

5D

6D

7D

SN54HC563 . . . FK PACKAGE

(TOP VIEW)

Copyright

© 1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.